Experimental study of etched back thermal oxide for optimization of the Si/high-k interface

Materials Research Society Symposium Proceedings

Volumn 811, Issue , 2004, Pages 341-346

  Barnett, Joel ^a   Moumen, N ^b   Gutt, J ^a   Gardner, M ^c   Huffman, C ^d   Majhi, P ^e   Peterson, J J ^a   Gopalan, S ^a   Foran, B ^a   Li, H J ^c   Lee, B H ^b   Bersuker, G ^a   Zeitzoff, P M ^a   Brown, G A ^a   Lysaght, P ^a   Young, C ^a   Murto, R W ^c   Huff, H R ^a  

^a SEMATECH   (United States)

^b IBM   (United States)

^c AMD ^*

^d TEXAS INSTRUMENTS   (United States)

^e PHILIPS RESEARCH LABORATORIES   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

DIELECTRIC FILMS; ELECTRON ENERGY LOSS SPECTROSCOPY; ENERGY DISPERSIVE SPECTROSCOPY; INTERFACES (MATERIALS); METALLORGANIC CHEMICAL VAPOR DEPOSITION; OPTIMIZATION; OXIDES; ROBUSTNESS (CONTROL SYSTEMS); SCANNING ELECTRON MICROSCOPY; TRANSMISSION ELECTRON MICROSCOPY;

CHEMICAL OXIDES; EQUIVALENT OXIDE THICKNESS (EOT); POWER CONSUMPTION; THERMAL OXIDES;

SILICON;

EID: 19944432750     PISSN: 02729172     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1557/proc-811-e1.4     Document Type: Conference Paper

References (7)

1. H.R. Huff, A. Hou, C. Lim, Y. Kim, J. Barnett, G. Bersuker, G.A. Brown, C.D. Young, P.M. Zeitzoff, J. Gutt, P. Lysaght, M.I. Gardner and R.W. Murto, Microelectronic Engineering, 69, No. 2-4 (September 2003), pp. 152-167.
2. H. Iwai, S. Ohmi, IEDM Conf. Proc., p.625, 2002.
3. M. I. Gardner, S. Gopalan, J. Gutt, J. Peterson, H-J Li, and H.R. Huff, International Workshop of Gate Insulators, November 2003, Tokyo, Japan, p. 170
4. NaiM Moumen, Joel Barnett, Robert W. Murto, Mark Gardner, Byoung Hun Lee, Gennadi Bersuker and Howard R. Huff, Physics and Technology of High-K Gate Dielectrics - II, Eds. S. Kar, R. Singh, D. Misra, H. Iwai, M. Houssa, J. Morais, and D. Landheer, PV 2003-22, The Electrochemical Society Proceedings Series, Pennington, NJ (2003), p. 59.
5. J.R. Hauser, K. Ahmed, AIP Conf. Proc., 449, No. 1 (1998), p. 235.
6. B. Foran, J. Barnett, P.S. Lysaght, M.P. Agustin, S. Stemmer, "Characterization of advanced gate stacks for Si CMOS by electron energy loss spectroscopy in scanning transmission electron microscopy" accepted for publication to the J. of Electron Spectroscopy, March, 2004.
7. S. Stemmer, Z. Q. Chen, C. G. Levi, P. S. Lysaght, B. Foran, J. A. Gisby, and J. R. Taylor, Jap. J. Appl. Phys. Part 1 42, 3593 (2003).