The negative bias temperature instability in MOS devices: A review

Microelectronics Reliability

Volumn 46, Issue 2-4, 2006, Pages 270-286

  Stathis, J H ^a   Zafar, S ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC CHARGE; ELECTRIC NETWORK ANALYSIS; MICROSCOPIC EXAMINATION;

GATE-STACK MATERIALS; METAL-OXIDE-SILICON (MOS); NEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI);

MOS DEVICES;

EID: 30844464359     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2005.08.001     Document Type: Article

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