Modelling negative bias temperature instabilities in advanced p-MOSFETs

Microelectronics Reliability

Volumn 45, Issue 1, 2005, Pages 3-12

  Houssa, M ^a,b  

^a IMEC   (Belgium)

^b AIX MARSEILLE UNIVERSITÉ   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ACCELERATION; CHEMICAL BONDS; COMPUTER SIMULATION; ELECTRIC POTENTIAL; ELECTRONS; INTERFACES (MATERIALS); STRESS ANALYSIS;

GATE BIAS; NEGATIVE BIAS; STRAINED BONDS; TEMPERATURE INSTABILITIES;

MOSFET DEVICES;

EID: 10044285750     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2004.03.015     Document Type: Article

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