New materials for post-Si computing: Ge and GeSn devices

MRS Bulletin

Volumn 39, Issue 8, 2014, Pages 678-686

  Gupta, Suyog ^a   Gong, Xiao ^b   Zhang, Rui ^c   Yeo, Yee Chia ^b   Takagi, Shinichi ^d   Saraswat, Krishna C ^e  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

^c ZHEJIANG UNIVERSITY   (China)

^d UNIVERSITY OF TOKYO   (Japan)

^e Stanford University   (United States)

Author keywords

Ge; nanoscale; Sn

Indexed keywords

CMOS INTEGRATED CIRCUITS; GERMANIUM; METALS; MOS DEVICES; NANOTECHNOLOGY; OXIDE SEMICONDUCTORS; SEMICONDUCTING GERMANIUM; SEMICONDUCTOR ALLOYS; SILICON; TIN; TIN ALLOYS; TIN OXIDES; TRANSISTORS;

COMPLEMENTARY METAL OXIDE SEMICONDUCTORS; GATE STACK FORMATION; HIGH MOBILITY MATERIALS; LOW-RESISTANCE CONTACTS; NANO SCALE; RESEARCH COMMUNITIES; SOURCE/DRAIN REGIONS; TRANSISTOR CHANNELS;

SI-GE ALLOYS;

EID: 84923331853     PISSN: 08837694     EISSN: None     Source Type: Journal    
DOI: 10.1557/mrs.2014.163     Document Type: Article

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