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Volumn 50, Issue 1, 2011, Pages
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Interface-controlled self-align source/drain Ge p-channel metal-oxide-semiconductor field-effect transistors fabricated using thermally oxidized Geo2 interfacial layers
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Author keywords
[No Author keywords available]
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Indexed keywords
ACTIVATION ANNEALING;
BORON ION IMPLANTATION;
CAPPING LAYER;
CARRIER DENSITY;
COULOMB SCATTERING;
DIFFERENT SUBSTRATES;
EFFECTIVE FIELD;
FABRICATION PROCESS;
GATE METALS;
IMPURITY CONCENTRATION;
INTERFACE ROUGHNESS;
INTERFACE TRAP DENSITY;
INTERFACIAL LAYER;
JUNCTION PROPERTIES;
LOW TEMPERATURES;
METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR;
MOS INTERFACE;
MOS-FET;
MOSFETS;
ON/OFF CURRENT RATIO;
OXIDATION TEMPERATURE;
P-MOSFETS;
PMOSFET;
S-FACTOR;
SCATTERING MECHANISMS;
SELF-ALIGN;
SOURCE AND DRAINS;
SOURCE/DRAIN REGIONS;
THERMAL OXIDATION;
THERMALLY OXIDIZED;
TRANSMISSION ELECTRON;
UNIVERSAL CURVE;
BORON;
BORON COMPOUNDS;
DIELECTRIC DEVICES;
DRAIN CURRENT;
FABRICATION;
FIELD EFFECT TRANSISTORS;
GERMANIUM;
ION BEAMS;
ION IMPLANTATION;
MOSFET DEVICES;
OXIDATION;
SCATTERING;
SURFACE ROUGHNESS;
TRANSMISSION ELECTRON MICROSCOPY;
HOLE MOBILITY;
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EID: 79951485042
PISSN: 00214922
EISSN: 13474065
Source Type: Journal
DOI: 10.1143/JJAP.50.010109 Document Type: Article |
Times cited : (43)
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References (22)
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