-
1
-
-
0023421993
-
Double-gate silicon-on-insulator transistor with volume inversion: A new device with greatly enhanced performance
-
F. Balestra, S. Cristoloveanu, M. Benachir, J. Brini, and T. Elewa Double-gate silicon-on-insulator transistor with volume inversion: A new device with greatly enhanced performance IEEE Electron Device Lett EDL-8 1987 410
-
(1987)
IEEE Electron Device Lett
, vol.8
, pp. 410
-
-
Balestra, F.1
Cristoloveanu, S.2
Benachir, M.3
Brini, J.4
Elewa, T.5
-
2
-
-
85056911965
-
Monte Carlo simulation of a 30 nm dual-gate MOSFET: How far can silicon go?
-
D. Frank, S. Laux, and M. Fischetti Monte Carlo simulation of a 30 nm dual-gate MOSFET: How far can silicon go? IEDM Technol Dig 1992 553
-
(1992)
IEDM Technol Dig
, pp. 553
-
-
Frank, D.1
Laux, S.2
Fischetti, M.3
-
3
-
-
0032284102
-
Device design considerations for double-gate, ground-plane, and single-gate ultra-thin SOI MOSFET's at the 25 nm gate length generation
-
H.-S.P. Wong, D.J. Frank, and P.M. Solomon Device design considerations for double-gate, ground-plane, and single-gate ultra-thin SOI MOSFET's at the 25 nm gate length generation IEDM Technol Dig 34 1998
-
(1998)
IEDM Technol Dig
, vol.34
-
-
Wong, H.-S.P.1
Frank, D.J.2
Solomon, P.M.3
-
4
-
-
1442360362
-
Multiple-gate SOI MOSFETs
-
J.P. Colinge Multiple-gate SOI MOSFETs Solid State Electron 48 6 2004 897 905
-
(2004)
Solid State Electron
, vol.48
, Issue.6
, pp. 897-905
-
-
Colinge, J.P.1
-
5
-
-
0037235405
-
Double jeopardy in the nanoscale court
-
Q. Chen, K.A. Bowman, E.M. Harell, and J.D. Meindl Double jeopardy in the nanoscale court IEEE Circuits Devices Mag 19 1 2003 28 34
-
(2003)
IEEE Circuits Devices Mag
, vol.19
, Issue.1
, pp. 28-34
-
-
Chen, Q.1
Bowman, K.A.2
Harell, E.M.3
Meindl, J.D.4
-
6
-
-
0842288130
-
Flexible threshold voltage FinFETs with independent double gates and an ideal rectangular cross-section Si-Fin channel
-
Y.X. Liu, M. Masahara, K. Ishii, T. Tsutsumi, T. Sekigawa, and H. Takashima Flexible threshold voltage FinFETs with independent double gates and an ideal rectangular cross-section Si-Fin channel IEDM Technol Dig 2003 986 988
-
(2003)
IEDM Technol Dig
, pp. 986-988
-
-
Liu, Y.X.1
Masahara, M.2
Ishii, K.3
Tsutsumi, T.4
Sekigawa, T.5
Takashima, H.6
-
7
-
-
44949152690
-
Universal potential model in tied and separated double-gate mosfets with consideration of symmetric and asymmetric structure
-
Jin-Woo Han, Chung-Jin Kim, and Yang-Kyu Choi Universal potential model in tied and separated double-gate mosfets with consideration of symmetric and asymmetric structure IEEE Trans Electron Devices 55 6 2008 1472 1479
-
(2008)
IEEE Trans Electron Devices
, vol.55
, Issue.6
, pp. 1472-1479
-
-
Han, J.-W.1
Kim, C.-J.2
Choi, Y.-K.3
-
8
-
-
16244376777
-
High performance and low power domino logic using independent gate control in double-gate SOI MOSFETs
-
H. Mahmoodi, S. Mukhopadhyay, and K. Roy High performance and low power domino logic using independent gate control in double-gate SOI MOSFETs Proc IEEE Int SOI Conf 2004 67 68
-
(2004)
Proc IEEE Int SOI Conf
, pp. 67-68
-
-
Mahmoodi, H.1
Mukhopadhyay, S.2
Roy, K.3
-
9
-
-
56749130052
-
Circuit techniques utilizing independent gate control in double-gate technologies
-
Jente B. Kuang, Keunwoo Kim, Ching-Te Chuang, Hung C. Ngo, Fadi H. Gebara, and Kevin J. Nowka Circuit techniques utilizing independent gate control in double-gate technologies IEEE Trans Very Large Scale Integration (VLSI) Syst 16 12 2008 1657 1665
-
(2008)
IEEE Trans Very Large Scale Integration (VLSI) Syst
, vol.16
, Issue.12
, pp. 1657-1665
-
-
Kuang, J.B.1
Kim, K.2
Chuang, C.-T.3
Ngo, H.C.4
Gebara, F.H.5
Nowka, K.J.6
-
10
-
-
33644998470
-
A novel high-performance and robust sense amplifier using independent gate control in sub-50 nm double-gate MOSFET
-
Saibal Mukhopadhyay, Hamid Mahmoodiand, and Kaushik Roy A novel high-performance and robust sense amplifier using independent gate control in sub-50 nm double-gate MOSFET IEEE Trans Very Large Scale Integr (VLSI) Syst 14 2 2006 183 192
-
(2006)
IEEE Trans Very Large Scale Integr (VLSI) Syst
, vol.14
, Issue.2
, pp. 183-192
-
-
Mukhopadhyay, S.1
Mahmoodiand, H.2
Roy, K.3
-
11
-
-
33947421763
-
Physical insights regarding design and performance of independent-gate FinFETs
-
Weimin Zhang, Jerry G. Fossum, Leo Mathew, and Yang Du Physical insights regarding design and performance of independent-gate FinFETs IEEE Trans Electron Devices 52 10 2005 2198 2206
-
(2005)
IEEE Trans Electron Devices
, vol.52
, Issue.10
, pp. 2198-2206
-
-
Zhang, W.1
Fossum, J.G.2
Mathew, L.3
Du, Y.4
-
12
-
-
26444580190
-
Power-area evaluation of double-gate RF mixer topologies
-
M.V.R. Reddy, D.K. Sharma, M.B. Patil, and V. Ramgopal Rao Power-area evaluation of double-gate RF mixer topologies IEEE Electron Device Lett 26 9 2005 664 666
-
(2005)
IEEE Electron Device Lett
, vol.26
, Issue.9
, pp. 664-666
-
-
Reddy, M.V.R.1
Sharma, D.K.2
Patil, M.B.3
Ramgopal Rao, V.4
-
13
-
-
56549114806
-
A novel and robust approach for common mode feedback using IDDG FinFET
-
M. Shrivastava, M. Baghini, A.B. Sachid, D.K. Sarma, and V. Ramgopal Rao A novel and robust approach for common mode feedback using IDDG FinFET IEEE Trans Electron Devices 55 11 2008 3274 3282
-
(2008)
IEEE Trans Electron Devices
, vol.55
, Issue.11
, pp. 3274-3282
-
-
Shrivastava, M.1
Baghini, M.2
Sachid, A.B.3
Sarma, D.K.4
Ramgopal Rao, V.5
-
14
-
-
0035694506
-
Analytic solutions of charge and capacitance in symmetric and asymmetric double-gate MOSFETs
-
Y. Taur Analytic solutions of charge and capacitance in symmetric and asymmetric double-gate MOSFETs IEEE Trans Electron Devices 48 12 2001 2861 2869
-
(2001)
IEEE Trans Electron Devices
, vol.48
, Issue.12
, pp. 2861-2869
-
-
Taur, Y.1
-
15
-
-
33646033169
-
An analytic potential model for symmetric and asymmetric DG MOSFETs
-
H. Lu, and Y. Taur An analytic potential model for symmetric and asymmetric DG MOSFETs IEEE Trans Electron Devices 53 5 2006 1161 1168
-
(2006)
IEEE Trans Electron Devices
, vol.53
, Issue.5
, pp. 1161-1168
-
-
Lu, H.1
Taur, Y.2
-
16
-
-
33646535276
-
A closed-form charge-based expression for drain current in symmetric and asymmetric double gate MOSFET
-
A.S. Roy, J.-M. Sallese, and C.C. Enz A closed-form charge-based expression for drain current in symmetric and asymmetric double gate MOSFET Solid State Electron 50 4 2006 687 693
-
(2006)
Solid State Electron
, vol.50
, Issue.4
, pp. 687-693
-
-
Roy, A.S.1
Sallese, J.-M.2
Enz, C.C.3
-
17
-
-
13644258469
-
Rigorous analytic solution for the drain current of undoped symmetric dual-gate MOSFETs
-
DOI 10.1016/j.sse.2005.01.017, PII S0038110105000493
-
A. Ortiz-Conde, F.J. García-Sánchez, and J. Muci Rigorous analytic solution for the drain current of undoped symmetric dual-gate MOSFETs Solid State Electron 49 4 2005 640 647 (Pubitemid 40226850)
-
(2005)
Solid-State Electronics
, vol.49
, Issue.4
, pp. 640-647
-
-
Ortiz-Conde, A.1
Sanchez, F.J.G.2
Muci, J.3
-
18
-
-
33846059690
-
A review of core compact models for undoped double-gate SOI MOSFETs
-
DOI 10.1109/TED.2006.887046
-
A. Ortiz-Conde, F.J. García-Sánchez, J. Muci, S. Malobabic, and J.J. Liou A review of core compact models for undoped double-gate SOI MOSFETs IEEE Trans Electron Devices 54 1 2007 131 140 (Pubitemid 46056051)
-
(2007)
IEEE Transactions on Electron Devices
, vol.54
, Issue.1
, pp. 131-140
-
-
Ortiz-Conde, A.1
Garcia-Sanchez, F.J.2
Muci, J.3
Malobabic, S.4
Liou, J.J.5
-
19
-
-
0027847411
-
Scaling theory for double-gate SOI MOSFETs
-
K. Suzuki, T. Tanaka, Y. Tosaka, H. Horie, and Y. Arimoto Scaling theory for double-gate SOI MOSFETs IEEE Trans Electron Devices 40 12 1993 2326 2329
-
(1993)
IEEE Trans Electron Devices
, vol.40
, Issue.12
, pp. 2326-2329
-
-
Suzuki, K.1
Tanaka, T.2
Tosaka, Y.3
Horie, H.4
Arimoto, Y.5
-
20
-
-
0034258881
-
Analytic description of short-channel effects in fully-depleted double-gate and cylindrical, surrounding-gate MOSFETs
-
S.-H. Oh, D. Monore, and J.M. Hergenrother Analytic description of short-channel effects in fully-depleted double-gate and cylindrical, surrounding-gate MOSFETs IEEE Electron Device Lett 21 9 2000 445 447
-
(2000)
IEEE Electron Device Lett
, vol.21
, Issue.9
, pp. 445-447
-
-
Oh, S.-H.1
Monore, D.2
Hergenrother, J.M.3
-
21
-
-
0042888776
-
Threshold voltage and subthreshold slope of multiple-gate SOI MOSFETs
-
J.P. Colinge, J.W. Park, and W. Xiong Threshold voltage and subthreshold slope of multiple-gate SOI MOSFETs IEEE Electron Device Lett 24 8 2003 515 519
-
(2003)
IEEE Electron Device Lett
, vol.24
, Issue.8
, pp. 515-519
-
-
Colinge, J.P.1
Park, J.W.2
Xiong, W.3
-
22
-
-
34248594084
-
Compact model for highly doped double-gate SOI MOSFETs targeting baseband analog applications
-
O. Moldovan, A. Cerdeira, D. Jiménez, J.-P. Raskin, V. Kilchytska, and D. Flandre Compact model for highly doped double-gate SOI MOSFETs targeting baseband analog applications Solid State Electron 51 5 2007 655 661
-
(2007)
Solid State Electron
, vol.51
, Issue.5
, pp. 655-661
-
-
Moldovan, O.1
Cerdeira, A.2
Jiménez, D.3
Raskin, J.-P.4
Kilchytska, V.5
Flandre, D.6
-
23
-
-
0141940281
-
A physical compact model of DG MOSFET for mixed-signal circuit applications -Part I: Model description
-
G. Pei, W. Ni, A.V. Kammula, B.A. Minch, and E.C.-C. Kan A physical compact model of DG MOSFET for mixed-signal circuit applications -Part I: Model description IEEE Trans Electron Devices 50 10 2003 2135 2143
-
(2003)
IEEE Trans Electron Devices
, vol.50
, Issue.10
, pp. 2135-2143
-
-
Pei, G.1
Ni, W.2
Kammula, A.V.3
Minch, B.A.4
Kan, E.C.-C.5
-
24
-
-
33747177561
-
An explicit analytical charge-based model of undoped independent double gate MOSFET
-
DOI 10.1016/j.sse.2006.05.019, PII S0038110106002036
-
M. Reyboz, O. Rozeau, T. Poiroux, P. Martin, and J. Jomaah An explicit analytical charge-based model of undoped independent double gate MOSFET Solid State Electron 50 1 2006 1276 1282 (Pubitemid 44232853)
-
(2006)
Solid-State Electronics
, vol.50
, Issue.7-8
, pp. 1276-1282
-
-
Reyboz, M.1
Rozeau, O.2
Poiroux, T.3
Martin, P.4
Jomaah, J.5
-
25
-
-
33751234993
-
Unification of asymmetric DG, symmetric DG and bulk undoped-body MOSFET drain current
-
A. Ortize-Conde, and F.J. Garcia-Sanchez Unification of asymmetric DG, symmetric DG and bulk undoped-body MOSFET drain current Solid State Electron 50 11/12 2006 1796 1800
-
(2006)
Solid State Electron
, vol.50
, Issue.11-12
, pp. 1796-1800
-
-
Ortize-Conde, A.1
Garcia-Sanchez, F.J.2
-
26
-
-
34547372388
-
Drain current and transconductance model for the undoped body asymmetric double-gate MOSFET
-
Shanghai, China, Oct.
-
Ortiz-Conde A, Garćia-Sánchez FJ, Malobabic S, Muci J, Salazar R. Drain current and transconductance model for the undoped body asymmetric double-gate MOSFET. In: Proceedings of eighth international conference solid-state integrated-circuit technology, Shanghai, China, Oct. 2006. p. 1239-42.
-
(2006)
Proceedings of Eighth International Conference Solid-state Integrated-circuit Technology
, pp. 1239-1242
-
-
Ortiz-Conde, A.1
Garćia-Sánchez, F.J.2
Malobabic, S.3
Muci, J.4
Salazar, R.5
-
27
-
-
40949083539
-
Member, Mansun Chan, Generic carrier-based core model for undoped four-terminal double-gate mosfets valid for symmetric, asymmetric, and independent-gate-operation modes
-
Liu Feng, He Jin, Fu Yue, Hu Jinhua, Bian Wei, and Song Yan Member, Mansun Chan, Generic carrier-based core model for undoped four-terminal double-gate mosfets valid for symmetric, asymmetric, and independent-gate- operation modes IEEE Trans Electron Devices 55 3 2008 816 826
-
(2008)
IEEE Trans Electron Devices
, vol.55
, Issue.3
, pp. 816-826
-
-
Feng, L.1
Jin, H.2
Yue, F.3
Jinhua, H.4
Wei, B.5
Yan, S.6
-
28
-
-
57149132530
-
A non-charge-sheet analytic model for symmetric double-gate MOSFETs with smooth transition between partially and fully depleted operation modes
-
Feng Liu, Jin He, Jian Zhang, Yu Chen, and Chan Mansun A non-charge-sheet analytic model for symmetric double-gate MOSFETs with smooth transition between partially and fully depleted operation modes IEEE Trans Electron Devices 55 12 2008 3494 3502
-
(2008)
IEEE Trans Electron Devices
, vol.55
, Issue.12
, pp. 3494-3502
-
-
Liu, F.1
He, J.2
Zhang, J.3
Chen, Y.4
Mansun, C.5
-
29
-
-
77949727783
-
A noncharge-sheet channel potential and drain current model for dynamic-depletion silicon-on-insulator metal-oxide-semiconductor field-effect transistors
-
054507
-
Jian Zhang, Lining Zhang, Jin He, and Mansun Chan A noncharge-sheet channel potential and drain current model for dynamic-depletion silicon-on-insulator metal-oxide-semiconductor field-effect transistors J Appl Phys 107 054507 2010
-
(2010)
J Appl Phys
, vol.107
-
-
Zhang, J.1
Zhang, L.2
He, J.3
Chan, M.4
-
31
-
-
57149127392
-
Analytical model of subthreshold current and slope for asymmetric 4-T and 3-T double-gate MOSFETs
-
Aritra Dey, Anjan Chakravorty, Nandita DasGupta, and Amitava DasGupta Analytical model of subthreshold current and slope for asymmetric 4-T and 3-T double-gate MOSFETs IEEE Trans Electron Devices 55 12 2008 3442 3449
-
(2008)
IEEE Trans Electron Devices
, vol.55
, Issue.12
, pp. 3442-3449
-
-
Dey, A.1
Chakravorty, A.2
Dasgupta, N.3
Dasgupta, A.4
-
32
-
-
84930556245
-
The effects of fixed bulk charge on the characteristics of metal-oxide-semiconductor transistors
-
C.T. Sah, and H.C. Pao The effects of fixed bulk charge on the characteristics of metal-oxide-semiconductor transistors IEEE Trans Electron Devices ED-13 4 1966 393 409
-
(1966)
IEEE Trans Electron Devices
, vol.13
, Issue.4
, pp. 393-409
-
-
Sah, C.T.1
Pao, H.C.2
-
33
-
-
0026926978
-
Long-channel silicon-on-insulator MOSFET theory
-
A. Ortiz-Conde, R. Herrera, P.E. Schmidt, F.J. García- Sánchez, and J. Andrian Long-channel silicon-on-insulator MOSFET theory Solid State Electron 35 9 1992 1291 1298
-
(1992)
Solid State Electron
, vol.35
, Issue.9
, pp. 1291-1298
-
-
Ortiz-Conde, A.1
Herrera, R.2
Schmidt, P.E.3
García-Sánchez, F.J.4
Andrian, J.5
-
34
-
-
0020708861
-
Simplified long-channel MOSFET theory
-
R.F. Pierret, and J.A. Shields Simplified long-channel MOSFET theory Solid State Electron 26 2 1983 143 147
-
(1983)
Solid State Electron
, vol.26
, Issue.2
, pp. 143-147
-
-
Pierret, R.F.1
Shields, J.A.2
-
35
-
-
33846116975
-
Surface-potential solution for generic undoped MOSFETs with two gates
-
Shangguan et al., Surface-potential solution for generic undoped MOSFETs with two gates, IEEE Trans Electron Devices 2007;54(1):169-72.
-
(2007)
IEEE Trans Electron Devices
, vol.54
, Issue.1
, pp. 169-172
-
-
Shangguan1
-
36
-
-
78751641356
-
Integrated Systems Engineering (ISE) TCAD Manuals
-
Zurich, Switzerland
-
Integrated Systems Engineering (ISE) TCAD Manuals, Integr Syst Eng, Zurich, Switzerland; 2006. [Release 10].
-
(2006)
Integr Syst Eng
-
-
|