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Volumn 56, Issue 1, 2011, Pages 148-154

A surface potential based drain current model for asymmetric double gate MOSFETs

Author keywords

Asymmetric double gate MOSFET; Pao Sah's double integral; Poisson's equation; Short channel effects

Indexed keywords

2-D NUMERICAL SIMULATION; ASYMMETRIC OPERATION; BACK GATES; CHANNEL DOPINGS; CHANNEL POTENTIAL; CURRENT VOLTAGE; DG MOSFETS; DOUBLE GATE MOSFET; DOUBLE INTEGRALS; DOUBLE-GATE MOSFETS; DRAIN CURRENT MODELS; GATE OXIDE; NEWTON-RAPHSON ITERATIVE METHOD; PAO-SAH'S DOUBLE INTEGRAL; POISSON'S EQUATION; SHORT-CHANNEL EFFECT; SOURCE AND DRAINS; SURFACE POTENTIAL-BASED; TERMINAL VOLTAGES;

EID: 78751643322     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2010.10.025     Document Type: Article
Times cited : (14)

References (36)
  • 1
    • 0023421993 scopus 로고
    • Double-gate silicon-on-insulator transistor with volume inversion: A new device with greatly enhanced performance
    • F. Balestra, S. Cristoloveanu, M. Benachir, J. Brini, and T. Elewa Double-gate silicon-on-insulator transistor with volume inversion: A new device with greatly enhanced performance IEEE Electron Device Lett EDL-8 1987 410
    • (1987) IEEE Electron Device Lett , vol.8 , pp. 410
    • Balestra, F.1    Cristoloveanu, S.2    Benachir, M.3    Brini, J.4    Elewa, T.5
  • 2
    • 85056911965 scopus 로고
    • Monte Carlo simulation of a 30 nm dual-gate MOSFET: How far can silicon go?
    • D. Frank, S. Laux, and M. Fischetti Monte Carlo simulation of a 30 nm dual-gate MOSFET: How far can silicon go? IEDM Technol Dig 1992 553
    • (1992) IEDM Technol Dig , pp. 553
    • Frank, D.1    Laux, S.2    Fischetti, M.3
  • 3
    • 0032284102 scopus 로고    scopus 로고
    • Device design considerations for double-gate, ground-plane, and single-gate ultra-thin SOI MOSFET's at the 25 nm gate length generation
    • H.-S.P. Wong, D.J. Frank, and P.M. Solomon Device design considerations for double-gate, ground-plane, and single-gate ultra-thin SOI MOSFET's at the 25 nm gate length generation IEDM Technol Dig 34 1998
    • (1998) IEDM Technol Dig , vol.34
    • Wong, H.-S.P.1    Frank, D.J.2    Solomon, P.M.3
  • 4
    • 1442360362 scopus 로고    scopus 로고
    • Multiple-gate SOI MOSFETs
    • J.P. Colinge Multiple-gate SOI MOSFETs Solid State Electron 48 6 2004 897 905
    • (2004) Solid State Electron , vol.48 , Issue.6 , pp. 897-905
    • Colinge, J.P.1
  • 6
    • 0842288130 scopus 로고    scopus 로고
    • Flexible threshold voltage FinFETs with independent double gates and an ideal rectangular cross-section Si-Fin channel
    • Y.X. Liu, M. Masahara, K. Ishii, T. Tsutsumi, T. Sekigawa, and H. Takashima Flexible threshold voltage FinFETs with independent double gates and an ideal rectangular cross-section Si-Fin channel IEDM Technol Dig 2003 986 988
    • (2003) IEDM Technol Dig , pp. 986-988
    • Liu, Y.X.1    Masahara, M.2    Ishii, K.3    Tsutsumi, T.4    Sekigawa, T.5    Takashima, H.6
  • 7
    • 44949152690 scopus 로고    scopus 로고
    • Universal potential model in tied and separated double-gate mosfets with consideration of symmetric and asymmetric structure
    • Jin-Woo Han, Chung-Jin Kim, and Yang-Kyu Choi Universal potential model in tied and separated double-gate mosfets with consideration of symmetric and asymmetric structure IEEE Trans Electron Devices 55 6 2008 1472 1479
    • (2008) IEEE Trans Electron Devices , vol.55 , Issue.6 , pp. 1472-1479
    • Han, J.-W.1    Kim, C.-J.2    Choi, Y.-K.3
  • 8
    • 16244376777 scopus 로고    scopus 로고
    • High performance and low power domino logic using independent gate control in double-gate SOI MOSFETs
    • H. Mahmoodi, S. Mukhopadhyay, and K. Roy High performance and low power domino logic using independent gate control in double-gate SOI MOSFETs Proc IEEE Int SOI Conf 2004 67 68
    • (2004) Proc IEEE Int SOI Conf , pp. 67-68
    • Mahmoodi, H.1    Mukhopadhyay, S.2    Roy, K.3
  • 10
    • 33644998470 scopus 로고    scopus 로고
    • A novel high-performance and robust sense amplifier using independent gate control in sub-50 nm double-gate MOSFET
    • Saibal Mukhopadhyay, Hamid Mahmoodiand, and Kaushik Roy A novel high-performance and robust sense amplifier using independent gate control in sub-50 nm double-gate MOSFET IEEE Trans Very Large Scale Integr (VLSI) Syst 14 2 2006 183 192
    • (2006) IEEE Trans Very Large Scale Integr (VLSI) Syst , vol.14 , Issue.2 , pp. 183-192
    • Mukhopadhyay, S.1    Mahmoodiand, H.2    Roy, K.3
  • 11
    • 33947421763 scopus 로고    scopus 로고
    • Physical insights regarding design and performance of independent-gate FinFETs
    • Weimin Zhang, Jerry G. Fossum, Leo Mathew, and Yang Du Physical insights regarding design and performance of independent-gate FinFETs IEEE Trans Electron Devices 52 10 2005 2198 2206
    • (2005) IEEE Trans Electron Devices , vol.52 , Issue.10 , pp. 2198-2206
    • Zhang, W.1    Fossum, J.G.2    Mathew, L.3    Du, Y.4
  • 14
    • 0035694506 scopus 로고    scopus 로고
    • Analytic solutions of charge and capacitance in symmetric and asymmetric double-gate MOSFETs
    • Y. Taur Analytic solutions of charge and capacitance in symmetric and asymmetric double-gate MOSFETs IEEE Trans Electron Devices 48 12 2001 2861 2869
    • (2001) IEEE Trans Electron Devices , vol.48 , Issue.12 , pp. 2861-2869
    • Taur, Y.1
  • 15
    • 33646033169 scopus 로고    scopus 로고
    • An analytic potential model for symmetric and asymmetric DG MOSFETs
    • H. Lu, and Y. Taur An analytic potential model for symmetric and asymmetric DG MOSFETs IEEE Trans Electron Devices 53 5 2006 1161 1168
    • (2006) IEEE Trans Electron Devices , vol.53 , Issue.5 , pp. 1161-1168
    • Lu, H.1    Taur, Y.2
  • 16
    • 33646535276 scopus 로고    scopus 로고
    • A closed-form charge-based expression for drain current in symmetric and asymmetric double gate MOSFET
    • A.S. Roy, J.-M. Sallese, and C.C. Enz A closed-form charge-based expression for drain current in symmetric and asymmetric double gate MOSFET Solid State Electron 50 4 2006 687 693
    • (2006) Solid State Electron , vol.50 , Issue.4 , pp. 687-693
    • Roy, A.S.1    Sallese, J.-M.2    Enz, C.C.3
  • 17
    • 13644258469 scopus 로고    scopus 로고
    • Rigorous analytic solution for the drain current of undoped symmetric dual-gate MOSFETs
    • DOI 10.1016/j.sse.2005.01.017, PII S0038110105000493
    • A. Ortiz-Conde, F.J. García-Sánchez, and J. Muci Rigorous analytic solution for the drain current of undoped symmetric dual-gate MOSFETs Solid State Electron 49 4 2005 640 647 (Pubitemid 40226850)
    • (2005) Solid-State Electronics , vol.49 , Issue.4 , pp. 640-647
    • Ortiz-Conde, A.1    Sanchez, F.J.G.2    Muci, J.3
  • 20
    • 0034258881 scopus 로고    scopus 로고
    • Analytic description of short-channel effects in fully-depleted double-gate and cylindrical, surrounding-gate MOSFETs
    • S.-H. Oh, D. Monore, and J.M. Hergenrother Analytic description of short-channel effects in fully-depleted double-gate and cylindrical, surrounding-gate MOSFETs IEEE Electron Device Lett 21 9 2000 445 447
    • (2000) IEEE Electron Device Lett , vol.21 , Issue.9 , pp. 445-447
    • Oh, S.-H.1    Monore, D.2    Hergenrother, J.M.3
  • 21
    • 0042888776 scopus 로고    scopus 로고
    • Threshold voltage and subthreshold slope of multiple-gate SOI MOSFETs
    • J.P. Colinge, J.W. Park, and W. Xiong Threshold voltage and subthreshold slope of multiple-gate SOI MOSFETs IEEE Electron Device Lett 24 8 2003 515 519
    • (2003) IEEE Electron Device Lett , vol.24 , Issue.8 , pp. 515-519
    • Colinge, J.P.1    Park, J.W.2    Xiong, W.3
  • 23
    • 0141940281 scopus 로고    scopus 로고
    • A physical compact model of DG MOSFET for mixed-signal circuit applications -Part I: Model description
    • G. Pei, W. Ni, A.V. Kammula, B.A. Minch, and E.C.-C. Kan A physical compact model of DG MOSFET for mixed-signal circuit applications -Part I: Model description IEEE Trans Electron Devices 50 10 2003 2135 2143
    • (2003) IEEE Trans Electron Devices , vol.50 , Issue.10 , pp. 2135-2143
    • Pei, G.1    Ni, W.2    Kammula, A.V.3    Minch, B.A.4    Kan, E.C.-C.5
  • 24
    • 33747177561 scopus 로고    scopus 로고
    • An explicit analytical charge-based model of undoped independent double gate MOSFET
    • DOI 10.1016/j.sse.2006.05.019, PII S0038110106002036
    • M. Reyboz, O. Rozeau, T. Poiroux, P. Martin, and J. Jomaah An explicit analytical charge-based model of undoped independent double gate MOSFET Solid State Electron 50 1 2006 1276 1282 (Pubitemid 44232853)
    • (2006) Solid-State Electronics , vol.50 , Issue.7-8 , pp. 1276-1282
    • Reyboz, M.1    Rozeau, O.2    Poiroux, T.3    Martin, P.4    Jomaah, J.5
  • 25
    • 33751234993 scopus 로고    scopus 로고
    • Unification of asymmetric DG, symmetric DG and bulk undoped-body MOSFET drain current
    • A. Ortize-Conde, and F.J. Garcia-Sanchez Unification of asymmetric DG, symmetric DG and bulk undoped-body MOSFET drain current Solid State Electron 50 11/12 2006 1796 1800
    • (2006) Solid State Electron , vol.50 , Issue.11-12 , pp. 1796-1800
    • Ortize-Conde, A.1    Garcia-Sanchez, F.J.2
  • 27
    • 40949083539 scopus 로고    scopus 로고
    • Member, Mansun Chan, Generic carrier-based core model for undoped four-terminal double-gate mosfets valid for symmetric, asymmetric, and independent-gate-operation modes
    • Liu Feng, He Jin, Fu Yue, Hu Jinhua, Bian Wei, and Song Yan Member, Mansun Chan, Generic carrier-based core model for undoped four-terminal double-gate mosfets valid for symmetric, asymmetric, and independent-gate- operation modes IEEE Trans Electron Devices 55 3 2008 816 826
    • (2008) IEEE Trans Electron Devices , vol.55 , Issue.3 , pp. 816-826
    • Feng, L.1    Jin, H.2    Yue, F.3    Jinhua, H.4    Wei, B.5    Yan, S.6
  • 28
    • 57149132530 scopus 로고    scopus 로고
    • A non-charge-sheet analytic model for symmetric double-gate MOSFETs with smooth transition between partially and fully depleted operation modes
    • Feng Liu, Jin He, Jian Zhang, Yu Chen, and Chan Mansun A non-charge-sheet analytic model for symmetric double-gate MOSFETs with smooth transition between partially and fully depleted operation modes IEEE Trans Electron Devices 55 12 2008 3494 3502
    • (2008) IEEE Trans Electron Devices , vol.55 , Issue.12 , pp. 3494-3502
    • Liu, F.1    He, J.2    Zhang, J.3    Chen, Y.4    Mansun, C.5
  • 29
    • 77949727783 scopus 로고    scopus 로고
    • A noncharge-sheet channel potential and drain current model for dynamic-depletion silicon-on-insulator metal-oxide-semiconductor field-effect transistors
    • 054507
    • Jian Zhang, Lining Zhang, Jin He, and Mansun Chan A noncharge-sheet channel potential and drain current model for dynamic-depletion silicon-on-insulator metal-oxide-semiconductor field-effect transistors J Appl Phys 107 054507 2010
    • (2010) J Appl Phys , vol.107
    • Zhang, J.1    Zhang, L.2    He, J.3    Chan, M.4
  • 31
    • 57149127392 scopus 로고    scopus 로고
    • Analytical model of subthreshold current and slope for asymmetric 4-T and 3-T double-gate MOSFETs
    • Aritra Dey, Anjan Chakravorty, Nandita DasGupta, and Amitava DasGupta Analytical model of subthreshold current and slope for asymmetric 4-T and 3-T double-gate MOSFETs IEEE Trans Electron Devices 55 12 2008 3442 3449
    • (2008) IEEE Trans Electron Devices , vol.55 , Issue.12 , pp. 3442-3449
    • Dey, A.1    Chakravorty, A.2    Dasgupta, N.3    Dasgupta, A.4
  • 32
    • 84930556245 scopus 로고
    • The effects of fixed bulk charge on the characteristics of metal-oxide-semiconductor transistors
    • C.T. Sah, and H.C. Pao The effects of fixed bulk charge on the characteristics of metal-oxide-semiconductor transistors IEEE Trans Electron Devices ED-13 4 1966 393 409
    • (1966) IEEE Trans Electron Devices , vol.13 , Issue.4 , pp. 393-409
    • Sah, C.T.1    Pao, H.C.2
  • 34
    • 0020708861 scopus 로고
    • Simplified long-channel MOSFET theory
    • R.F. Pierret, and J.A. Shields Simplified long-channel MOSFET theory Solid State Electron 26 2 1983 143 147
    • (1983) Solid State Electron , vol.26 , Issue.2 , pp. 143-147
    • Pierret, R.F.1    Shields, J.A.2
  • 35
    • 33846116975 scopus 로고    scopus 로고
    • Surface-potential solution for generic undoped MOSFETs with two gates
    • Shangguan et al., Surface-potential solution for generic undoped MOSFETs with two gates, IEEE Trans Electron Devices 2007;54(1):169-72.
    • (2007) IEEE Trans Electron Devices , vol.54 , Issue.1 , pp. 169-172
    • Shangguan1
  • 36
    • 78751641356 scopus 로고    scopus 로고
    • Integrated Systems Engineering (ISE) TCAD Manuals
    • Zurich, Switzerland
    • Integrated Systems Engineering (ISE) TCAD Manuals, Integr Syst Eng, Zurich, Switzerland; 2006. [Release 10].
    • (2006) Integr Syst Eng


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