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Volumn 55, Issue 11, 2008, Pages 3274-3282

A novel and robust approach for common mode feedback using IDDG FinFET

Author keywords

Common mode feedback (CMFB); FinFET; Independently driven double gate (IDDG); Mixed signal

Indexed keywords

BICMOS TECHNOLOGY; CIRCUIT SIMULATION; DIFFERENTIAL AMPLIFIERS; NETWORKS (CIRCUITS);

EID: 56549114806     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2008.2004475     Document Type: Article
Times cited : (40)

References (30)
  • 3
    • 0029701860 scopus 로고    scopus 로고
    • P. Kinget and M. Steyaert, Impact of transistor mismatch on the speed-accuracy-power tradeoff of analog CMOS circuits, in Proc. IEEE Custom Integr. Circuits Conf., May 1996, pp. 15.4.1-15.4.4.
    • P. Kinget and M. Steyaert, "Impact of transistor mismatch on the speed-accuracy-power tradeoff of analog CMOS circuits," in Proc. IEEE Custom Integr. Circuits Conf., May 1996, pp. 15.4.1-15.4.4.
  • 4
    • 0028548950 scopus 로고
    • Experimental study of threshold voltage fluctuation due to statistical variation of channel dopant number in MOSFETs
    • Nov
    • T. Mizuno, J. Okumtura, and A. Toriumi, "Experimental study of threshold voltage fluctuation due to statistical variation of channel dopant number in MOSFETs," IEEE Trans. Electron Devices, vol. 41, no. 11, pp. 2216-2221, Nov. 1994.
    • (1994) IEEE Trans. Electron Devices , vol.41 , Issue.11 , pp. 2216-2221
    • Mizuno, T.1    Okumtura, J.2    Toriumi, A.3
  • 5
    • 0035445204 scopus 로고    scopus 로고
    • A study of the threshold voltage variation for ultra-small bulk and SOI CMOS
    • Sep
    • K. Takeuchi, R. Koh, and T. Mogami, "A study of the threshold voltage variation for ultra-small bulk and SOI CMOS," IEEE Trans. Electron Devices, vol. 48, no. 9, pp. 1995-2001, Sep. 2001.
    • (2001) IEEE Trans. Electron Devices , vol.48 , Issue.9 , pp. 1995-2001
    • Takeuchi, K.1    Koh, R.2    Mogami, T.3
  • 6
    • 10644230219 scopus 로고    scopus 로고
    • Fabrication of metal gated FinFETs through complete gate silicidation with Ni
    • Dec
    • J. Kedzierski et al., "Fabrication of metal gated FinFETs through complete gate silicidation with Ni," IEEE Trans. Electron Devices vol. 51, no. 12, pp. 2115-2120, Dec. 2004.
    • (2004) IEEE Trans. Electron Devices , vol.51 , Issue.12 , pp. 2115-2120
    • Kedzierski, J.1
  • 8
    • 34250658542 scopus 로고    scopus 로고
    • Analog circuits using FinFETs: Benefits in speed-accuracy-power tradeoff and simulation of parasitic effects
    • M. Fulde et al., "Analog circuits using FinFETs: Benefits in speed-accuracy-power tradeoff and simulation of parasitic effects," Adv. Radio Sci., vol. 5, pp. 285-290, 2007.
    • (2007) Adv. Radio Sci , vol.5 , pp. 285-290
    • Fulde, M.1
  • 9
    • 33744760140 scopus 로고    scopus 로고
    • Design and evaluation of basic analog circuits in an emerging MuGFET technology
    • Oct
    • G. Knoblinger et al., "Design and evaluation of basic analog circuits in an emerging MuGFET technology," in Proc. IEEE Int. SOI Conf., Oct. 2005, pp. 39-40.
    • (2005) Proc. IEEE Int. SOI Conf , pp. 39-40
    • Knoblinger, G.1
  • 10
    • 37649030925 scopus 로고    scopus 로고
    • Suitability of FinFET technology for low-power mixed-signal applications
    • May
    • B. Parvais et al., "Suitability of FinFET technology for low-power mixed-signal applications," in Proc. Int. Conf. Integr. Circuit Des. Technol., May 2006, pp. 1-4.
    • (2006) Proc. Int. Conf. Integr. Circuit Des. Technol , pp. 1-4
    • Parvais, B.1
  • 11
    • 33947243464 scopus 로고    scopus 로고
    • Planar bulk MOSFETs versus FinFETs: An analog/RF perspective
    • Dec
    • V. Subramanian et al., "Planar bulk MOSFETs versus FinFETs: An analog/RF perspective," IEEE Trans. Electron Devices, vol. 53, no. 12, pp. 3071-3079, Dec. 2006.
    • (2006) IEEE Trans. Electron Devices , vol.53 , Issue.12 , pp. 3071-3079
    • Subramanian, V.1
  • 12
    • 1842865629 scopus 로고    scopus 로고
    • Turning silicon on its edge
    • Jan./Feb
    • E. J. Nowak et al., "Turning silicon on its edge," IEEE Circuits Devices Mag., vol. 20, no. 1, pp. 20-31, Jan./Feb. 2004.
    • (2004) IEEE Circuits Devices Mag , vol.20 , Issue.1 , pp. 20-31
    • Nowak, E.J.1
  • 13
    • 0028756972 scopus 로고
    • Design and performance considerations for sub-0.1 μm double-gate SOI MOSFETs
    • Dec
    • H.-S. Wong, D. J. Frank, T. Yuan, and J. M. C. Stork, "Design and performance considerations for sub-0.1 μm double-gate SOI MOSFETs," in IEDM Tech. Dig., Dec. 1994, pp. 747-750.
    • (1994) IEDM Tech. Dig , pp. 747-750
    • Wong, H.-S.1    Frank, D.J.2    Yuan, T.3    Stork, J.M.C.4
  • 15
    • 10644271735 scopus 로고    scopus 로고
    • Independently driven DG MOSFETs for mixed-signal circuits: Part I - Quasi-static and nonquasi-static channel coupling
    • Feb
    • G. Pei and E. C.-C. Kan, "Independently driven DG MOSFETs for mixed-signal circuits: Part I - Quasi-static and nonquasi-static channel coupling," IEEE Trans. Electron Devices, vol. 51, no. 12, pp. 2086-2093, Feb. 2004.
    • (2004) IEEE Trans. Electron Devices , vol.51 , Issue.12 , pp. 2086-2093
    • Pei, G.1    Kan, E.C.-C.2
  • 16
    • 33947421763 scopus 로고    scopus 로고
    • Physical insights regarding design and performance of independent-gate FinFETs
    • Oct
    • W. Zhang, J. G. Fossum, L. Mathew, and Y. Du, "Physical insights regarding design and performance of independent-gate FinFETs," IEEE Trans. Electron Devices, vol. 52, no. 10, pp. 2198-2206, Oct. 2005.
    • (2005) IEEE Trans. Electron Devices , vol.52 , Issue.10 , pp. 2198-2206
    • Zhang, W.1    Fossum, J.G.2    Mathew, L.3    Du, Y.4
  • 17
    • 10644228697 scopus 로고    scopus 로고
    • Independently driven DG MOSFETs for mixed-signal circuits: Part II - Applications on cross-coupled feedback and harmonics generation
    • Feb
    • G. Pei and E. C.-C. Kan, "Independently driven DG MOSFETs for mixed-signal circuits: Part II - Applications on cross-coupled feedback and harmonics generation," IEEE Trans. Electron Devices, vol. 51, no. 12, pp. 2094-2101, Feb. 2004.
    • (2004) IEEE Trans. Electron Devices , vol.51 , Issue.12 , pp. 2094-2101
    • Pei, G.1    Kan, E.C.-C.2
  • 18
    • 0842288130 scopus 로고    scopus 로고
    • Flexible threshold voltage FinFETs with independent double gates and an ideal rectangular cross-section Si-Fin channel
    • Washington, DC, Dec
    • Y. X. Liu et al., "Flexible threshold voltage FinFETs with independent double gates and an ideal rectangular cross-section Si-Fin channel," in IEDM Tech. Dig., Washington, DC, Dec. 2003, pp. 986-988.
    • (2003) IEDM Tech. Dig , pp. 986-988
    • Liu, Y.X.1
  • 20
    • 20144387099 scopus 로고    scopus 로고
    • CMOS vertical multiple independent gate field effect transistor
    • Oct
    • L. Mathew et al., "CMOS vertical multiple independent gate field effect transistor," in Proc. IEEE Int. SOI Conf., Oct. 2004, pp. 187-189.
    • (2004) Proc. IEEE Int. SOI Conf , pp. 187-189
    • Mathew, L.1
  • 21
    • 16244383181 scopus 로고    scopus 로고
    • Low voltage and performance tunable CMOS circuit design using independently driven double gate MOSFETs
    • Oct
    • A. Kumar et al., "Low voltage and performance tunable CMOS circuit design using independently driven double gate MOSFETs," in Proc. IEEE Int. SOI Conf., Oct. 2004, pp. 119-121.
    • (2004) Proc. IEEE Int. SOI Conf , pp. 119-121
    • Kumar, A.1
  • 22
    • 39749142331 scopus 로고    scopus 로고
    • Device design and optimization considerations for bulk FinFETs
    • Feb
    • C. R. Manoj, M. Nagpal, D. Varghese, and V. Ramgopal Rao, "Device design and optimization considerations for bulk FinFETs," IEEE Trans. Electron Devices, vol. 55, no. 2, pp. 609-615, Feb. 2008.
    • (2008) IEEE Trans. Electron Devices , vol.55 , Issue.2 , pp. 609-615
    • Manoj, C.R.1    Nagpal, M.2    Varghese, D.3    Ramgopal Rao, V.4
  • 23
    • 37549053754 scopus 로고    scopus 로고
    • Impact of high-k gate dielectrics on the device and circuit performance of nanoscale FinFETs
    • Apr
    • C. R. Manoj and V. Ramgopal Rao, "Impact of high-k gate dielectrics on the device and circuit performance of nanoscale FinFETs," IEEE Electron Device Lett., vol. 28, no. 4, pp. 295-297, Apr. 2007.
    • (2007) IEEE Electron Device Lett , vol.28 , Issue.4 , pp. 295-297
    • Manoj, C.R.1    Ramgopal Rao, V.2
  • 24
    • 56549083876 scopus 로고    scopus 로고
    • Sentaurus Structure Editor, Synopsys Inc., Mountain View, CA, Mar. 2007. Version Z-2007.03.
    • Sentaurus Structure Editor, Synopsys Inc., Mountain View, CA, Mar. 2007. Version Z-2007.03.
  • 25
    • 0242332710 scopus 로고    scopus 로고
    • Sensitivity of double-gate and FinFET devices to process variations
    • Nov
    • S. Xiong and J. Bokor, "Sensitivity of double-gate and FinFET devices to process variations," IEEE Trans. Electron Devices, vol. 50, no. 11, pp. 2255-2261, Nov. 2003.
    • (2003) IEEE Trans. Electron Devices , vol.50 , Issue.11 , pp. 2255-2261
    • Xiong, S.1    Bokor, J.2
  • 26
    • 56549104548 scopus 로고    scopus 로고
    • Sentaurus Device User Guide, Synopsys Inc., Mountain View, CA, Mar. 2007. Version Z-2007.03.
    • Sentaurus Device User Guide, Synopsys Inc., Mountain View, CA, Mar. 2007. Version Z-2007.03.
  • 27
    • 19944418823 scopus 로고    scopus 로고
    • 2 and SiON gate dielectrics and TaN gate electrode
    • Jun
    • 2 and SiON gate dielectrics and TaN gate electrode," Microelectron. Eng., vol. 80, pp. 386-389, Jun. 2005.
    • (2005) Microelectron. Eng , vol.80 , pp. 386-389
    • Rudenko, T.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.