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Volumn 55, Issue 12, 2008, Pages 3494-3502

A non-charge-sheet analytic model for symmetric double-gate MOSFETs with smooth transition between partially and fully depleted operation modes

Author keywords

Compact model; Double gate (DG) MOSFET; Fully depleted (FD); Non charge sheet current; Partially depleted (PD)

Indexed keywords

CIRCUIT SIMULATION; DOPING (ADDITIVES); DRAIN CURRENT; FINITE DIFFERENCE METHOD; GALERKIN METHODS; PAPER SHEETING; POISSON EQUATION; POWDERS;

EID: 57149132530     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2008.2006544     Document Type: Article
Times cited : (38)

References (46)
  • 1
    • 0023421993 scopus 로고
    • Double-gate silicon-on-insulator transistor with volume inversion: A new device with greatly enhanced performance
    • Aug
    • F. Balestra, S. Cristoloveanu, M. Benachir, J. Brini, and T. Elewa, "Double-gate silicon-on-insulator transistor with volume inversion: A new device with greatly enhanced performance," IEEE Electron Device Lett., vol. ED-8, no. 9, pp. 410-412, Aug. 1987.
    • (1987) IEEE Electron Device Lett , vol.ED-8 , Issue.9 , pp. 410-412
    • Balestra, F.1    Cristoloveanu, S.2    Benachir, M.3    Brini, J.4    Elewa, T.5
  • 2
    • 85056911965 scopus 로고
    • Monte Carlo simulation of a 30 nm dual-gate MOSFET: How short can Si go?
    • Dec
    • D. J. Frank, S. E. Laux, and M. V. Fischetti, "Monte Carlo simulation of a 30 nm dual-gate MOSFET: How short can Si go?" in IEDM Tech. Dig., Dec. 1992, pp. 553-556.
    • (1992) IEDM Tech. Dig , pp. 553-556
    • Frank, D.J.1    Laux, S.E.2    Fischetti, M.V.3
  • 3
    • 0032284102 scopus 로고    scopus 로고
    • Device design considerations for double-gate, ground-plane, and single-gated ultra-thin SOI MOSFETs at the 25 nm gate length generation
    • Dec
    • H.-S. P. Wong, D. J. Frank, and P. M. Solomon, "Device design considerations for double-gate, ground-plane, and single-gated ultra-thin SOI MOSFETs at the 25 nm gate length generation," in IEDM Tech. Dig., Dec. 1998, pp. 407-410.
    • (1998) IEDM Tech. Dig , pp. 407-410
    • Wong, H.-S.P.1    Frank, D.J.2    Solomon, P.M.3
  • 4
    • 0033100297 scopus 로고    scopus 로고
    • Design and optimization of dual-threshold circuits for low-voltage low-power applications
    • Mar
    • L. Wei, Z. Chen, K. Roy, M. C. Johnson, Y. Ye, and V. K. De, "Design and optimization of dual-threshold circuits for low-voltage low-power applications," IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 7, no. 1, pp. 16-24, Mar. 1999.
    • (1999) IEEE Trans. Very Large Scale Integr. (VLSI) Syst , vol.7 , Issue.1 , pp. 16-24
    • Wei, L.1    Chen, Z.2    Roy, K.3    Johnson, M.C.4    Ye, Y.5    De, V.K.6
  • 6
    • 0035694506 scopus 로고    scopus 로고
    • Analytic solutions of charge and capacitance in symmetric and asymmetric double-gate MOSFETs
    • Dec
    • Y. Taut, "Analytic solutions of charge and capacitance in symmetric and asymmetric double-gate MOSFETs," IEEE Trans. Electron Devices, vol. 48, no. 12, pp. 2861-2869, Dec. 2001.
    • (2001) IEEE Trans. Electron Devices , vol.48 , Issue.12 , pp. 2861-2869
    • Taut, Y.1
  • 7
    • 33646033169 scopus 로고    scopus 로고
    • An analytic potential model for symmetric and asymmetric DG MOSFETs
    • May
    • H. Lu and Y. Taur, "An analytic potential model for symmetric and asymmetric DG MOSFETs," IEEE Trans. Electron Devices, vol. 53, no. 5, pp. 1161-1168, May 2006.
    • (2006) IEEE Trans. Electron Devices , vol.53 , Issue.5 , pp. 1161-1168
    • Lu, H.1    Taur, Y.2
  • 8
    • 39749186785 scopus 로고    scopus 로고
    • Rigorous surface-potential solution for undoped symmetric double-gate MOSFETs considering both electrons and holes at quasi non-equilibrium
    • Feb
    • X. Zhou, Z. Zhu, S. C. Rustagi, G. Huei See, G. Zhu, S. Lin, C. Wei, and G. H. Lim, "Rigorous surface-potential solution for undoped symmetric double-gate MOSFETs considering both electrons and holes at quasi non-equilibrium," IEEE Trans. Electron Devices, vol. 55, no. 2, pp. 616-623, Feb. 2008.
    • (2008) IEEE Trans. Electron Devices , vol.55 , Issue.2 , pp. 616-623
    • Zhou, X.1    Zhu, Z.2    Rustagi, S.C.3    Huei See, G.4    Zhu, G.5    Lin, S.6    Wei, C.7    Lim, G.H.8
  • 9
    • 12344336837 scopus 로고    scopus 로고
    • A design oriented charge-based current model for symmetric DG MOSFET and its correlation with the EKV formalism
    • Mar
    • J. M. Sallese, F. Krummenacher, F. Pregaldiny, C. Lallement, A. S. Roy, and C. C. Enz, "A design oriented charge-based current model for symmetric DG MOSFET and its correlation with the EKV formalism," Solid State Electron., vol. 49, no. 3, pp. 485-489, Mar. 2005.
    • (2005) Solid State Electron , vol.49 , Issue.3 , pp. 485-489
    • Sallese, J.M.1    Krummenacher, F.2    Pregaldiny, F.3    Lallement, C.4    Roy, A.S.5    Enz, C.C.6
  • 10
    • 33646535276 scopus 로고    scopus 로고
    • A closed-form charge-based expression for drain-current in symmetric and asymmetric double gate MOSFET
    • Apr
    • A. S. Roy, J.-M. Sallese, and C. C. Enz, "A closed-form charge-based expression for drain-current in symmetric and asymmetric double gate MOSFET," Solid State Electron., vol. 50, no. 4, pp. 687-693, Apr. 2006.
    • (2006) Solid State Electron , vol.50 , Issue.4 , pp. 687-693
    • Roy, A.S.1    Sallese, J.-M.2    Enz, C.C.3
  • 11
    • 13644258469 scopus 로고    scopus 로고
    • Rigorous analytic solution for the drain current of undoped symmetric dual-gate MOSFETs
    • Apr
    • A. Ortiz-Conde, F. J. García-Sánchez, and J. Muci, "Rigorous analytic solution for the drain current of undoped symmetric dual-gate MOSFETs," Solid State Electron., vol. 49, no. 4, pp. 640-647, Apr. 2005.
    • (2005) Solid State Electron , vol.49 , Issue.4 , pp. 640-647
    • Ortiz-Conde, A.1    García-Sánchez, F.J.2    Muci, J.3
  • 13
    • 34247877544 scopus 로고    scopus 로고
    • A carrier-based approach for compact modeling of the long-channel undoped symmetric double-gate MOSFETs
    • May
    • J. He, F. Liu, J. Zhang, J. Feng, J. Hu, S. Yang, and M. Chan, "A carrier-based approach for compact modeling of the long-channel undoped symmetric double-gate MOSFETs," IEEE Trans. Electron Devices, vol. 54, no. 5, pp. 1203-1209, May 2007.
    • (2007) IEEE Trans. Electron Devices , vol.54 , Issue.5 , pp. 1203-1209
    • He, J.1    Liu, F.2    Zhang, J.3    Feng, J.4    Hu, J.5    Yang, S.6    Chan, M.7
  • 14
    • 40949083539 scopus 로고    scopus 로고
    • Generic carrier-based core model for undoped four-terminal double-gate MOSFETs valid for symmetric, asymmetric, and independent-gate-operation modes
    • Mar
    • F. Liu, J. He, Y. Fu, J. Hu, W. Bian, Y. Song, X. Zhang, and M. Chan, "Generic carrier-based core model for undoped four-terminal double-gate MOSFETs valid for symmetric, asymmetric, and independent-gate-operation modes," IEEE Trans. Electron Devices, vol. 55, no. 3, pp. 816-826, Mar. 2008.
    • (2008) IEEE Trans. Electron Devices , vol.55 , Issue.3 , pp. 816-826
    • Liu, F.1    He, J.2    Fu, Y.3    Hu, J.4    Bian, W.5    Song, Y.6    Zhang, X.7    Chan, M.8
  • 15
    • 0042026582 scopus 로고    scopus 로고
    • Analytical solutions to the one-dimensional oxide-silicon-oxide system
    • Aug
    • X. Shi and M. Wong, "Analytical solutions to the one-dimensional oxide-silicon-oxide system," IEEE Trans. Electron Devices, vol. 50, no. 8, pp. 1793-1800, Aug. 2003.
    • (2003) IEEE Trans. Electron Devices , vol.50 , Issue.8 , pp. 1793-1800
    • Shi, X.1    Wong, M.2
  • 17
    • 0034258881 scopus 로고    scopus 로고
    • Analytic description of short-channel effects in fully-depleted double-gate and cylindrical, surrounding-gate MOSFETs
    • Sep
    • S.-H. Oh, D. Monore, and J. M. Hergenrother, "Analytic description of short-channel effects in fully-depleted double-gate and cylindrical, surrounding-gate MOSFETs," IEEE Electron Device Lett., vol. 21, no. 9, pp. 445-447, Sep. 2000.
    • (2000) IEEE Electron Device Lett , vol.21 , Issue.9 , pp. 445-447
    • Oh, S.-H.1    Monore, D.2    Hergenrother, J.M.3
  • 18
    • 0042888776 scopus 로고    scopus 로고
    • Threshold voltage and subthreshold slope of multiple-gate SOI MOSFETs
    • Aug
    • J. P. Colinge, J. W. Park, and W. Xiong, "Threshold voltage and subthreshold slope of multiple-gate SOI MOSFETs," IEEE Electron Device Lett., vol. 24, no. 8, pp. 515-519, Aug. 2003.
    • (2003) IEEE Electron Device Lett , vol.24 , Issue.8 , pp. 515-519
    • Colinge, J.P.1    Park, J.W.2    Xiong, W.3
  • 21
    • 84888628829 scopus 로고    scopus 로고
    • A continuous compact MOSFET model for fully- and partially-depleted SOI devices
    • Apr
    • J. W. Sleight and R. Rios, "A continuous compact MOSFET model for fully- and partially-depleted SOI devices," IEEE Trans. Electron Devices, vol. 45, no. 4, pp. 821-825, Apr. 1998.
    • (1998) IEEE Trans. Electron Devices , vol.45 , Issue.4 , pp. 821-825
    • Sleight, J.W.1    Rios, R.2
  • 22
    • 0024682924 scopus 로고
    • An analytic model for thin SOI transistors
    • Jun
    • J. B. McKitterick and A. L. Caviglia, "An analytic model for thin SOI transistors," IEEE Trans. Electron Devices, vol. 36, no. 6, pp. 1133-1138, Jun. 1989.
    • (1989) IEEE Trans. Electron Devices , vol.36 , Issue.6 , pp. 1133-1138
    • McKitterick, J.B.1    Caviglia, A.L.2
  • 24
    • 39749185449 scopus 로고
    • The foundation of a charge-sheet model for the thin-film MOSFET
    • Oct
    • A. Ortiz-Conde, F. J. Garcia Sanchez, P. E. Schmidt, and A. Sa-Neto, "The foundation of a charge-sheet model for the thin-film MOSFET," Solid State Electron., vol. 31, no. 10, pp. 1497-1500, Oct. 1988.
    • (1988) Solid State Electron , vol.31 , Issue.10 , pp. 1497-1500
    • Ortiz-Conde, A.1    Garcia Sanchez, F.J.2    Schmidt, P.E.3    Sa-Neto, A.4
  • 26
    • 0017932965 scopus 로고
    • A charge-sheet model of the MOSFET
    • Feb
    • J. R. Brews, "A charge-sheet model of the MOSFET," Solid State Electron., vol. 21, no. 2, pp. 345-355, Feb. 1978.
    • (1978) Solid State Electron , vol.21 , Issue.2 , pp. 345-355
    • Brews, J.R.1
  • 27
    • 0033732282 scopus 로고    scopus 로고
    • An analytical solution to a double-gate MOSFET with undoped body
    • May
    • Y. Taut, "An analytical solution to a double-gate MOSFET with undoped body," IEEE Electron Device Lett., vol. 21, no. 5, pp. 245-247, May 2000.
    • (2000) IEEE Electron Device Lett , vol.21 , Issue.5 , pp. 245-247
    • Taut, Y.1
  • 30
    • 0017942903 scopus 로고
    • Analytical I.G.F.E.T. model including drift and diffusion currents
    • Mar
    • G. Baccarani, M. Rudan, and G. Spadini, "Analytical I.G.F.E.T. model including drift and diffusion currents," IEE J. Solid-State Electron Devices, vol. 2, no. 3, pp. 62-68, Mar. 1978.
    • (1978) IEE J. Solid-State Electron Devices , vol.2 , Issue.3 , pp. 62-68
    • Baccarani, G.1    Rudan, M.2    Spadini, G.3
  • 31
    • 0034159715 scopus 로고    scopus 로고
    • An explicit surface-potential-based MOSFET model for circuit simulation
    • Mar
    • R. van Langevelde and F. M. Klaassen, "An explicit surface-potential-based MOSFET model for circuit simulation," Solid State Electron., vol. 44, no. 3, pp. 409-418, Mar. 2000.
    • (2000) Solid State Electron , vol.44 , Issue.3 , pp. 409-418
    • van Langevelde, R.1    Klaassen, F.M.2
  • 33
    • 0029209413 scopus 로고
    • Moderate inversion model of ultrathin double-gate nMOS/SOI transistors
    • Jan
    • P. Francis, A. Terao, D. Flandre, and F. Van de Wiele, "Moderate inversion model of ultrathin double-gate nMOS/SOI transistors," Solid State Electron., vol. 38, no. 1, pp. 171-176, Jan. 1995.
    • (1995) Solid State Electron , vol.38 , Issue.1 , pp. 171-176
    • Francis, P.1    Terao, A.2    Flandre, D.3    Van de Wiele, F.4
  • 34
    • 57149133293 scopus 로고    scopus 로고
    • Available
    • [Online]. Available: http://mathworld.wolfram.com
  • 35
    • 33847644335 scopus 로고    scopus 로고
    • A physics-based analytic solution to the MOSFET surface potential from accumulation to strong-inversion region
    • Sep
    • J. He, M. Chan, X. Zhang, and Y. Wang, "A physics-based analytic solution to the MOSFET surface potential from accumulation to strong-inversion region," IEEE Trans. Electron Devices, vol. 53, no. 9, pp. 2008-2016, Sep. 2006.
    • (2006) IEEE Trans. Electron Devices , vol.53 , Issue.9 , pp. 2008-2016
    • He, J.1    Chan, M.2    Zhang, X.3    Wang, Y.4
  • 37
    • 57149142665 scopus 로고    scopus 로고
    • Xsim: Unified compact model for future generation CMOS
    • Boston, MA, Jun. 5, 2008, Online, Available
    • X. Zhou, "Xsim: Unified compact model for future generation CMOS," in Proc. CMC Conf. Next Generation SOI MOSFET Compact Models, Boston, MA, Jun. 5, 2008. [Online]. Available: http://www.geia.org
    • Proc. CMC Conf. Next Generation SOI MOSFET Compact Models
    • Zhou, X.1
  • 39
    • 49949134400 scopus 로고
    • Effects of diffusion current on characteristics of metal-oxide (insulator)-semiconductor transistors
    • Oct
    • H. C. Pao and C. T. Sah, "Effects of diffusion current on characteristics of metal-oxide (insulator)-semiconductor transistors," Solid State Electron., vol. 9, no. 10, pp. 927-937, Oct. 1966.
    • (1966) Solid State Electron , vol.9 , Issue.10 , pp. 927-937
    • Pao, H.C.1    Sah, C.T.2
  • 41
    • 0020708861 scopus 로고
    • Simplified long-channel MOSFET theory
    • Feb
    • R. F. Pierret and J. A. Shields, "Simplified long-channel MOSFET theory," Solid State Electron., vol. 26, no. 2, pp. 143-147, Feb. 1983.
    • (1983) Solid State Electron , vol.26 , Issue.2 , pp. 143-147
    • Pierret, R.F.1    Shields, J.A.2
  • 45
    • 0343555165 scopus 로고
    • The effects of fixed bulk charge on the characteristics of metal-oxide-semiconductor transistors
    • Apr
    • C. T. Sah and H. C. Pao, "The effects of fixed bulk charge on the characteristics of metal-oxide-semiconductor transistors," IEEE Trans. Electron Devices, vol. ED-13, no. 4, pp. 393-409, Apr. 1966.
    • (1966) IEEE Trans. Electron Devices , vol.ED-13 , Issue.4 , pp. 393-409
    • Sah, C.T.1    Pao, H.C.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.