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Volumn 55, Issue 3, 2006, Pages 268-280

Simulation of computer architectures: Simulators, benchmarks, methodologies, and recommendations

Author keywords

Evaluation; Measurement; Measurement techniques; Modeling; Modeling of computer architecture; Modeling techniques; Simulation; Simulation of multiple processor systems

Indexed keywords

COMPUTER NETWORKS; COMPUTER SIMULATION; MEASUREMENT THEORY; PRINCIPAL COMPONENT ANALYSIS;

EID: 32044443861     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2006.44     Document Type: Review
Times cited : (72)

References (133)
  • 1
    • 32044469534 scopus 로고    scopus 로고
    • http://www.futuremark.com/products/3dmark05, 2006.
    • (2006)
  • 5
    • 32044439738 scopus 로고    scopus 로고
    • http://www.llnl.gov/asci_benchmarks/asci/asci_code_list.html, 2006.
    • (2006)
  • 6
    • 0036469652 scopus 로고    scopus 로고
    • "SimpleScalar: An Infrastructure for Computer System Modeling"
    • Feb
    • T. Austin, E. Larson, and D. Ernst, "SimpleScalar: An Infrastructure for Computer System Modeling," Computer, vol. 35, no. 2, pp. 59-67, Feb. 2002.
    • (2002) Computer , vol.35 , Issue.2 , pp. 59-67
    • Austin, T.1    Larson, E.2    Ernst, D.3
  • 9
    • 0032069891 scopus 로고    scopus 로고
    • "Calibration of Microprocessor Performance Models"
    • May
    • B. Black and J. Shen, "Calibration of Microprocessor Performance Models," Computer, vol. 31, no. 5, pp. 59-65, May 1998.
    • (1998) Computer , vol.31 , Issue.5 , pp. 59-65
    • Black, B.1    Shen, J.2
  • 10
    • 0032070245 scopus 로고    scopus 로고
    • "Performance Analysis and Its Impact on Design"
    • May
    • P. Bose and T. Conte, "Performance Analysis and Its Impact on Design," Computer, vol. 31, no. 5, pp. 41-49, May 1998.
    • (1998) Computer , vol.31 , Issue.5 , pp. 41-49
    • Bose, P.1    Conte, T.2
  • 11
    • 0032658099 scopus 로고    scopus 로고
    • "Challenges in Processor Modeling and Validation"
    • May/June
    • P. Bose, T. Conte, and T. Austin, "Challenges in Processor Modeling and Validation," IEEE Micro, vol. 19, no. 3, May/June 1999.
    • (1999) IEEE Micro , vol.19 , Issue.3
    • Bose, P.1    Conte, T.2    Austin, T.3
  • 13
    • 0346898058 scopus 로고    scopus 로고
    • "New Methodology for Early-Stage, Microarchitecture-Level Power-Performance Analysis of Microprocessors"
    • Sept
    • D. Brooks, P. Bose, V. Srinivasan, M. Gschwind, P. Emma, and M. Rosenfield, "New Methodology for Early-Stage, Microarchitecture-Level Power-Performance Analysis of Microprocessors," IBM J. Research and Development, vol. 47, nos. 5/6, pp. 653-670, Sept. 2003.
    • (2003) IBM J. Research and Development , vol.47 , Issue.5-6 , pp. 653-670
    • Brooks, D.1    Bose, P.2    Srinivasan, V.3    Gschwind, M.4    Emma, P.5    Rosenfield, M.6
  • 16
    • 32044444213 scopus 로고    scopus 로고
    • "Direct SMARTS: Accelerating Microarchitectural Simulation through Direct Execution"
    • master's thesis, Carnegie Mellon Univ
    • S. Chen, "Direct SMARTS: Accelerating Microarchitectural Simulation through Direct Execution," master's thesis, Carnegie Mellon Univ., 2004.
    • (2004)
    • Chen, S.1
  • 17
    • 4243073044 scopus 로고    scopus 로고
    • "Parallel Simulation of Chip-Multiprocessor Architectures"
    • July
    • M. Chidester and A. George, "Parallel Simulation of Chip-Multiprocessor Architectures," ACM Trans. Modeling and Computer Simulation, vol. 12, no. 3, pp. 176-200, July 2002.
    • (2002) ACM Trans. Modeling and Computer Simulation , vol.12 , Issue.3 , pp. 176-200
    • Chidester, M.1    George, A.2
  • 18
    • 0038008203 scopus 로고    scopus 로고
    • "MisSPECulation: Partial and Misleading Use of SPEC CPU2000 in Computer Architecture Conferences"
    • Panel Discussion at Int'l Symp. Computer Architecture
    • D. Citron, "MisSPECulation: Partial and Misleading Use of SPEC CPU2000 in Computer Architecture Conferences," Panel Discussion at Int'l Symp. Computer Architecture, 2003.
    • (2003)
    • Citron, D.1
  • 19
  • 20
    • 1842860791 scopus 로고    scopus 로고
    • "Combining Trace Sampling with Single Pass Methods for Efficient Cache Simulation"
    • June
    • T. Conte, M. Hirsch, and W. Hwu, "Combining Trace Sampling with Single Pass Methods for Efficient Cache Simulation," IEEE Trans. Computers, vol. 47, no. 6, pp. 714-720, June 1998.
    • (1998) IEEE Trans. Computers , vol.47 , Issue.6 , pp. 714-720
    • Conte, T.1    Hirsch, M.2    Hwu, W.3
  • 29
    • 0037325558 scopus 로고    scopus 로고
    • "Designing Computer Architecture Workloads"
    • Feb
    • L. Eeckhout, H. Vandierendonck, and K. De Bosschere, "Designing Computer Architecture Workloads," Computer, vol. 36, no. 2, pp. 65-71, Feb. 2003.
    • (2003) Computer , vol.36 , Issue.2 , pp. 65-71
    • Eeckhout, L.1    Vandierendonck, H.2    De Bosschere, K.3
  • 31
    • 1842852992 scopus 로고    scopus 로고
    • "Efficient Simulation of Trace Samples on Parallel Machines"
    • Mar
    • L. Eeckhout and K. De Bosschere, "Efficient Simulation of Trace Samples on Parallel Machines," Parallel Computing, vol. 30, no. 3, pp. 317-335, Mar. 2004.
    • (2004) Parallel Computing , vol.30 , Issue.3 , pp. 317-335
    • Eeckhout, L.1    De Bosschere, K.2
  • 33
    • 32044439227 scopus 로고    scopus 로고
    • http://www.eembc.org, 2006.
    • (2006)
  • 36
    • 0030712794 scopus 로고    scopus 로고
    • "Modeling Cost/Performance of a Parallel Computer Simulator"
    • Jan
    • B. Falsafi and D. Wood, "Modeling Cost/Performance of a Parallel Computer Simulator," ACM Trans. Modeling and Computer Simulation, vol. 7, no. 1, pp. 104-130, Jan. 1997.
    • (1997) ACM Trans. Modeling and Computer Simulation , vol.7 , Issue.1 , pp. 104-130
    • Falsafi, B.1    Wood, D.2
  • 37
    • 32044473180 scopus 로고    scopus 로고
    • http://www.cs.wisc.edu/gems, 2006.
    • (2006)
  • 40
    • 12344269377 scopus 로고    scopus 로고
    • "Analysis of Simulation-Adapted SPEC 2000 Benchmarks"
    • Sept
    • I. Gómez, L. Pifiuel, M. Prieto, and F. Tirado, "Analysis of Simulation-Adapted SPEC 2000 Benchmarks," Computer Architecture News, vol. 30, no. 4, pp. 4-10, Sept. 2002.
    • (2002) Computer Architecture News , vol.30 , Issue.4 , pp. 4-10
    • Gómez, I.1    Pifiuel, L.2    Prieto, M.3    Tirado, F.4
  • 45
    • 0034226001 scopus 로고    scopus 로고
    • "SPEC CPU2000: Measuring CPU Performance in the New Millennium"
    • July
    • J. Henning, "SPEC CPU2000: Measuring CPU Performance in the New Millennium," Computer, vol. 33, no. 7, pp. 28-35, July 2000.
    • (2000) Computer , vol.33 , Issue.7 , pp. 28-35
    • Henning, J.1
  • 46
    • 0036470602 scopus 로고    scopus 로고
    • "Rsim: Simulating Shared-Memory Multiprocessors with ILP Processors"
    • Feb
    • C. Hughes, V. Pai, P. Ranganathan, and S. Adve, "Rsim: Simulating Shared-Memory Multiprocessors with ILP Processors," Computer, vol. 35, no. 2, pp. 40-49, Feb. 2002.
    • (2002) Computer , vol.35 , Issue.2 , pp. 40-49
    • Hughes, C.1    Pai, V.2    Ranganathan, P.3    Adve, S.4
  • 48
    • 32044453923 scopus 로고    scopus 로고
    • http://www.epcc.ed.ac.uk/javagrande/index_1.html, 2006.
    • (2006)
  • 49
    • 32044436192 scopus 로고    scopus 로고
    • "Benchmarks"
    • (draft) L. Kurian John and L. Eeckhout, eds., CRC Press, to be published
    • L. Kurian John, "Benchmarks," (draft) Modern Simulation and Analysis Techniques, L. Kurian John and L. Eeckhout, eds., CRC Press, to be published.
    • Modern Simulation and Analysis Techniques
    • Kurian John, L.1
  • 50
    • 32044470381 scopus 로고    scopus 로고
    • "Performance Modeling and Measurement Techniques"
    • (draft) L. Kurian John and L. Eeckhout, eds., CRC Press, to be published
    • L. Kurian John, "Performance Modeling and Measurement Techniques," (draft) Modern Simulation and Analysis Techniques, L. Kurian John and L. Eeckhout, eds., CRC Press, to be published.
    • Modern Simulation and Analysis Techniques
    • Kurian John, L.1
  • 51
    • 0028445155 scopus 로고
    • "A Comparison of Trace-Sampling Techniques for Multi-Megabyte Caches"
    • June
    • R. Kessler, M. Hill, and D. Wood, "A Comparison of Trace-Sampling Techniques for Multi-Megabyte Caches," IEEE Trans. Computers, vol. 43, no. 6, pp. 664-675, June 1994.
    • (1994) IEEE Trans. Computers , vol.43 , Issue.6 , pp. 664-675
    • Kessler, R.1    Hill, M.2    Wood, D.3
  • 52
    • 0034317861 scopus 로고    scopus 로고
    • "Validating Tract-Driven Microarchitectural Simulations"
    • Nov./Dec
    • H. Khalid, "Validating Tract-Driven Microarchitectural Simulations," IEEE Micro, vol. 20, no. 6, pp. 76-82, Nov./Dec. 2000.
    • (2000) IEEE Micro , vol.20 , Issue.6 , pp. 76-82
    • Khalid, H.1
  • 53
    • 85008031236 scopus 로고    scopus 로고
    • "MinneSPEC: A New SPEC Benchmark Workload for Simulation-Based Computer Architecture Research"
    • June
    • A. KleinOsowski and D. Lilja, "MinneSPEC: A New SPEC Benchmark Workload for Simulation-Based Computer Architecture Research," Computer Architecture Letters, vol. 1, June 2002.
    • (2002) Computer Architecture Letters , vol.1
    • KleinOsowski, A.1    Lilja, D.2
  • 55
    • 1842849819 scopus 로고    scopus 로고
    • "Choosing Representative Slices of Program Execution for Microarchitecture Simulations: A Preliminary Application to the Data Stream"
    • T. Lafage and A. Seznec, "Choosing Representative Slices of Program Execution for Microarchitecture Simulations: A Preliminary Application to the Data Stream," Proc. Workshop Workload Characterization, 2000.
    • (2000) Proc. Workshop Workload Characterization
    • Lafage, T.1    Seznec, A.2
  • 56
    • 0024107186 scopus 로고
    • "Accurate Low-Cost Methods for Performance Evaluation of Cache Memory Systems"
    • Nov
    • S. Laha, J. Patel, and R. Iyer, "Accurate Low-Cost Methods for Performance Evaluation of Cache Memory Systems," IEEE Trans. Computers, vol. 37, no. 11, pp. 1325-1336, Nov. 1988.
    • (1988) IEEE Trans. Computers , vol.37 , Issue.11 , pp. 1325-1336
    • Laha, S.1    Patel, J.2    Iyer, R.3
  • 60
    • 1842871851 scopus 로고
    • "Accelerating Architectural Simulation by Parallel Execution of Trace Samples"
    • Sun Microsystems Laboratory Technical Report TR-93-22
    • G. Lauterbach, "Accelerating Architectural Simulation by Parallel Execution of Trace Samples," Sun Microsystems Laboratory Technical Report TR-93-22, 1993.
    • (1993)
    • Lauterbach, G.1
  • 61
    • 0344119460 scopus 로고    scopus 로고
    • "NpBench: A Benchmark Suite for Control Plane and Data Plane Applications for Network Processors"
    • B. Lee and L. Kurian John, "NpBench: A Benchmark Suite for Control Plane and Data Plane Applications for Network Processors," Proc. Int'l Conf. Computer Design, 2003.
    • (2003) Proc. Int'l Conf. Computer Design
    • Lee, B.1    Kurian John, L.2
  • 64
    • 8444250655 scopus 로고    scopus 로고
    • "EXPERT: Expedited Simulation Exploiting Program Behavior Repetition"
    • W. Liu and M. Huang, "EXPERT: Expedited Simulation Exploiting Program Behavior Repetition," Proc. Int'l Conf. Supercomputing, 2004.
    • (2004) Proc. Int'l Conf. Supercomputing
    • Liu, W.1    Huang, M.2
  • 65
    • 32044449939 scopus 로고    scopus 로고
    • http://www.bitmover.com/lm/lmbench, 2006.
    • (2006)
  • 66
    • 85008034312 scopus 로고    scopus 로고
    • "Efficiently Evaluating Speedup Using Sampled Processor Simulation"
    • Sept
    • Y. Luo and L. Kurian John, "Efficiently Evaluating Speedup Using Sampled Processor Simulation," Computer Architecture Letters, vol. 3, Sept. 2004.
    • (2004) Computer Architecture Letters , vol.3
    • Luo, Y.1    Kurian John, L.2
  • 68
    • 32044446841 scopus 로고    scopus 로고
    • http://m5.eecs.umich.edu, 2006.
    • (2006)
  • 70
    • 0003792125 scopus 로고    scopus 로고
    • "Multiprocessor Enhancements of the SimpleScalar Tool Set"
    • Mar
    • N. Manjikian, "Multiprocessor Enhancements of the SimpleScalar Tool Set," Computer Architecture News, vol. 29, no. 1, pp. 8-15, Mar. 2001.
    • (2001) Computer Architecture News , vol.29 , Issue.1 , pp. 8-15
    • Manjikian, N.1
  • 76
    • 0034785241 scopus 로고    scopus 로고
    • "Functional Abstraction Design Space Exploration of Heterogeneous Programmable Architectures"
    • P. Mishra, N. Dutt, and A. Nicolau, "Functional Abstraction Design Space Exploration of Heterogeneous Programmable Architectures," Proc. Int'l Symp. System Synthesis, 2001.
    • (2001) Proc. Int'l Symp. System Synthesis
    • Mishra, P.1    Dutt, N.2    Nicolau, A.3
  • 77
    • 32044464643 scopus 로고    scopus 로고
    • "Techniques for Fast Simulation of Associative Cache Directories"
    • IBM Research Report RC21038
    • M. Moudgill, "Techniques for Fast Simulation of Associative Cache Directories," IBM Research Report RC21038, 1997.
    • (1997)
    • Moudgill, M.1
  • 78
    • 0031650582 scopus 로고    scopus 로고
    • "Techniques for Implementing Fast Processor Simulators"
    • M. Moudgill, "Techniques for Implementing Fast Processor Simulators," Proc. Ann. Simulation Symp., 1998.
    • (1998) Proc. Ann. Simulation Symp.
    • Moudgill, M.1
  • 81
    • 32044447335 scopus 로고    scopus 로고
    • http://www.nas.nasa.gov/Software/NPB, 2006.
    • (2006)
  • 84
    • 0032674031 scopus 로고    scopus 로고
    • "LISA - Machine Description Language for Cycle-Accurate Models of Programmable DSP Architectures"
    • S. Pees, A. Hoffmann, V. Zivojnovic, and H. Meyr, "LISA - Machine Description Language for Cycle-Accurate Models of Programmable DSP Architectures," Proc. Design Automation Conf., 1999.
    • (1999) Proc. Design Automation Conf.
    • Pees, S.1    Hoffmann, A.2    Zivojnovic, V.3    Meyr, H.4
  • 85
    • 0043136464 scopus 로고    scopus 로고
    • "Optimizations for a Simulator Construction System Supporting Reusable Components"
    • D. Penry and D. August, "Optimizations for a Simulator Construction System Supporting Reusable Components," Proc. Design Automation Conf., 2003.
    • (2003) Proc. Design Automation Conf.
    • Penry, D.1    August, D.2
  • 87
  • 89
    • 32044442395 scopus 로고
    • "Execution-Driven Tools for Parallel Simulation of Parallel Architectures and Applications"
    • D. Poulsen and P. Yew, "Execution-Driven Tools for Parallel Simulation of Parallel Architectures and Applications," Proc. Supercomputing, 1993.
    • (1993) Proc. Supercomputing
    • Poulsen, D.1    Yew, P.2
  • 90
    • 32044466822 scopus 로고    scopus 로고
    • http://www.eecs.umich.edu/panalyzer, 2006.
    • (2006)
  • 91
    • 32044473869 scopus 로고    scopus 로고
    • http://eda.ee.ucla.edu/PowerImpact, 2006.
    • (2006)
  • 95
    • 32044467470 scopus 로고    scopus 로고
    • http://rsim.cs.uiuc.edu/distribution, 2006.
    • (2006)
  • 97
    • 32044468837 scopus 로고    scopus 로고
    • http://math.nist.gov/scimark2, 2006.
    • (2006)
  • 98
    • 0348158498 scopus 로고    scopus 로고
    • "Design and Validation of a Performance and Power Simulator for PowerPC Systems"
    • Sept./Nov
    • H. Shafi, P. Bohrer, J. Phelan, C. Rusu, and J. Peterson, "Design and Validation of a Performance and Power Simulator for PowerPC Systems," IBM J. Research and Development, vol. 47, nos. 5/6, pp. 641-651, Sept./Nov. 2003.
    • (2003) IBM J. Research and Development , vol.47 , Issue.5-6 , pp. 641-651
    • Shafi, H.1    Bohrer, P.2    Phelan, J.3    Rusu, C.4    Peterson, J.5
  • 101
    • 32044444511 scopus 로고    scopus 로고
    • http://research.compaq.com/wrl/projects/SimOS/SimOs.html, 2004.
    • (2004)
  • 102
    • 32044451201 scopus 로고    scopus 로고
    • http://www.research.ibm.com/arl/projects/SimOSppc.html, 2006.
    • (2006)
  • 103
    • 0002255264 scopus 로고
    • "SPLASH: The Stanford ParalleL Application for SHared Memory"
    • J. Singh, W. Weber, and A. Gupta, "SPLASH: The Stanford ParalleL Application for SHared Memory," Computer Architecture News, vol. 20, no. 1, pp. 5-44, 1992.
    • (1992) Computer Architecture News , vol.20 , Issue.1 , pp. 5-44
    • Singh, J.1    Weber, W.2    Gupta, A.3
  • 104
    • 0033220924 scopus 로고    scopus 로고
    • "Branch Prediction, Instruction-Window Size, and Cache Size: Performance Trade-Offs and Simulation Techniques"
    • Nov
    • K. Skadron, P. Ahuja, M. Martonosi, and D. Clark, "Branch Prediction, Instruction-Window Size, and Cache Size: Performance Trade-Offs and Simulation Techniques," IEEE Trans. Computers, vol. 48, no. 11, pp. 1260-1281, Nov. 1999.
    • (1999) IEEE Trans. Computers , vol.48 , Issue.11 , pp. 1260-1281
    • Skadron, K.1    Ahuja, P.2    Martonosi, M.3    Clark, D.4
  • 105
    • 32044434553 scopus 로고    scopus 로고
    • http://www.spec.org/benchmarks.html, 2006.
    • (2006)
  • 106
    • 32044456842 scopus 로고    scopus 로고
    • http://www.spec.org/hpg, 2006.
    • (2006)
  • 107
    • 32044463476 scopus 로고    scopus 로고
    • http://www.specbench.org/jbb2000, 2006.
    • (2006)
  • 108
    • 32044448847 scopus 로고    scopus 로고
    • http://www.specbench.org/jvm98, 2006.
    • (2006)
  • 109
    • 32044474335 scopus 로고    scopus 로고
    • http://www.futuremark.com/products/sysmark2004, 2006.
    • (2006)
  • 110
    • 32044474546 scopus 로고    scopus 로고
    • http://www.tpc.org, 2006.
    • (2006)
  • 120
    • 32044459828 scopus 로고    scopus 로고
    • "Introduction to the Simics Full-System Simulator without Equal"
    • Virtutech White Paper
    • "Introduction to the Simics Full-System Simulator without Equal," Virtutech White Paper, 2002.
    • (2002)
  • 121
    • 32044471180 scopus 로고    scopus 로고
    • http://www.volano.com/benchmarks.html, 2006.
    • (2006)
  • 122
    • 84976706468 scopus 로고
    • "Efficient Trace-Driven Simulation Methods for Cache Performance Analysis"
    • Aug
    • W. Wang and J. Baer, "Efficient Trace-Driven Simulation Methods for Cache Performance Analysis," ACM Trans. Computer Systems, vol. 9, no. 3, pp. 222-241, Aug. 1991.
    • (1991) ACM Trans. Computer Systems , vol.9 , Issue.3 , pp. 222-241
    • Wang, W.1    Baer, J.2
  • 123
    • 0025568269 scopus 로고
    • "An Overview of Common Benchmarks"
    • Dec
    • R. Weicker, "An Overview of Common Benchmarks," Computer, vol. 23, no. 12, pp. 65-75, Dec. 1990.
    • (1990) Computer , vol.23 , Issue.12 , pp. 65-75
    • Weicker, R.1
  • 124
    • 0033299119 scopus 로고    scopus 로고
    • "The Standardization of Embedded Benchmarking: Pitfalls and Opportunities"
    • A. Weiss, "The Standardization of Embedded Benchmarking: Pitfalls and Opportunities," Proc. Int'l Conf. Computer Design, 1999.
    • (1999) Proc. Int'l Conf. Computer Design
    • Weiss, A.1
  • 125
    • 33744462550 scopus 로고    scopus 로고
    • "TurboSMARTS: Accurate Microarchitecture Simulation Sampling in Minutes"
    • Poster at the Int'l Conf. Measurement and Modeling of Computer Systems
    • T. Wenisch, R. Wunderlich, B. Falsafi, and J. Hoe, "TurboSMARTS: Accurate Microarchitecture Simulation Sampling in Minutes," Poster at the Int'l Conf. Measurement and Modeling of Computer Systems, 2005.
    • (2005)
    • Wenisch, T.1    Wunderlich, R.2    Falsafi, B.3    Hoe, J.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.