Speeding up architectural simulations for high-performance processors

Simulation

Volumn 80, Issue 9, 2004, Pages 451-468

  Eeckhout, Lieven ^a   De Bosschere, Koen ^a  

^a GHENT UNIVERSITY   (Belgium)

Author keywords

Architectural design; Computer architecture; Reduced input sets; Statistical simulation; Trace sampling

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER SOFTWARE; MICROPROCESSOR CHIPS; PERFORMANCE; PROBABILITY; STATISTICAL METHODS;

REDUCED INPUT SETS; STATISTICAL SIMULATION; TRACE SAMPLING;

COMPUTER SIMULATION;

EID: 11844256347     PISSN: 00375497     EISSN: None     Source Type: Journal    
DOI: 10.1177/0037549704044326     Document Type: Article

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