-
1
-
-
0024104573
-
Cache performance of operating system and multiprogramming workloads
-
Nov
-
A. Agarwal, J. Hennessy, and M. Horowitz. Cache performance of operating system and multiprogramming workloads. ACM Trans. on Computer Systems, 6(4), Nov 1988.
-
(1988)
ACM Trans. on Computer Systems
, vol.6
, Issue.4
-
-
Agarwal, A.1
Hennessy, J.2
Horowitz, M.3
-
2
-
-
27544456083
-
Addressing workload variability in architectural simulations
-
Feb.
-
A. R. Alameldeen and D. A. Wood. Addressing workload variability in architectural simulations. In HPCA-9, Feb. 2003.
-
(2003)
HPCA-9
-
-
Alameldeen, A.R.1
Wood, D.A.2
-
4
-
-
1842860791
-
Combining trace sampling with single pass methods for efficient cache simulation
-
June
-
T. M. Conte, M. A. Hirsch, and W. W. Hwu. Combining trace sampling with single pass methods for efficient cache simulation. IEEE Trans. on Computers, C-47(6), June 1998.
-
(1998)
IEEE Trans. on Computers
, vol.C-47
, Issue.6
-
-
Conte, T.M.1
Hirsch, M.A.2
Hwu, W.W.3
-
6
-
-
0032805141
-
Improving the accuracy vs. speed tradeoff for simulating shared-memory multiprocessors with ILP processors
-
Jan.
-
M. Durbhakula, V. S. Pai, and S. V. Adve. Improving the accuracy vs. speed tradeoff for simulating shared-memory multiprocessors with ILP processors. In HPCA-5, Jan. 1999.
-
(1999)
HPCA-5
-
-
Durbhakula, M.1
Pai, V.S.2
Adve, S.V.3
-
7
-
-
27544466004
-
Simflex: A fast, accurate, flexible full-system simulation framework for performance evaluation of server architecture
-
March
-
N. Hardavellas at al. Simflex: A fast, accurate, flexible full-system simulation framework for performance evaluation of server architecture. ACM SIGMETRICS Performance Evaluation Review, 31(4):31-35, March 2004.
-
(2004)
ACM SIGMETRICS Performance Evaluation Review
, vol.31
, Issue.4
, pp. 31-35
-
-
Hardavellas, N.1
-
8
-
-
84943402809
-
Memory reference reuse latency: Accelerated sampled microarchitecture simulation
-
Mar.
-
J. Haskins, Jr. and K. Skadron. Memory reference reuse latency: Accelerated sampled microarchitecture simulation. In ISPASS, pages 195-203, Mar. 2003.
-
(2003)
ISPASS
, pp. 195-203
-
-
Haskins Jr., J.1
Skadron, K.2
-
9
-
-
0024903997
-
Evaluating associativity in CPU caches
-
M. D. Hill and A. J. Smith. Evaluating associativity in CPU caches. IEEE Trans. on Computers, 38(12):1612-1630, 1989.
-
(1989)
IEEE Trans. on Computers
, vol.38
, Issue.12
, pp. 1612-1630
-
-
Hill, M.D.1
Smith, A.J.2
-
11
-
-
0024107186
-
Accurate low-cost methods for performance evaluation of cache memory systems
-
Feb
-
S. Laha, J. A. Patel, and R. K. Iyer. Accurate low-cost methods for performance evaluation of cache memory systems. IEEE Trans. on Computers, Feb 1988.
-
(1988)
IEEE Trans. on Computers
-
-
Laha, S.1
Patel, J.A.2
Iyer, R.K.3
-
12
-
-
1842871851
-
Accelerating architectural simulation by parallel execution of trace samples
-
Sun Microsystems Laboratories, Dec.
-
G. Lauterbach. Accelerating architectural simulation by parallel execution of trace samples. Technical Report TR-93-22, Sun Microsystems Laboratories, Dec. 1993.
-
(1993)
Technical Report
, vol.TR-93-22
-
-
Lauterbach, G.1
-
13
-
-
84858898717
-
-
Bochs. July
-
K. Lawton et al. Bochs. http://bochs.sourcef orge.net, July 2004.
-
(2004)
-
-
Lawton, K.1
-
14
-
-
84858900082
-
-
June
-
C. Leiserson et al. Cilk 5.3.2. http://supertech.les.mit.edu/cilk, June 2000.
-
(2000)
Cilk 5.3.2
-
-
Leiserson, C.1
-
15
-
-
0036469676
-
Simics: A full system simulation platform
-
Feb.
-
P. S. Magnusson et al. Simics: A full system simulation platform. IEEE Computer, Feb. 2002.
-
(2002)
IEEE Computer
-
-
Magnusson, P.S.1
-
16
-
-
0034290427
-
Wisconsin wind tunnel II: A fast, portable parallel architecture simulator
-
October-December
-
S.S. Mukherjee et al. Wisconsin Wind Tunnel II: A fast, portable parallel architecture simulator. IEEE Concurrency, 8(4): 12-20, October-December 2000.
-
(2000)
IEEE Concurrency
, vol.8
, Issue.4
, pp. 12-20
-
-
Mukherjee, S.S.1
-
18
-
-
0033719951
-
HLS: Combining statistical and symbolic simulation to guide microprocessor designs
-
Jun
-
M. Oskin, F. T. Chong, and M. Farrens. HLS: Combining statistical and symbolic simulation to guide microprocessor designs. In ISCA-27, Jun 2000.
-
(2000)
ISCA-27
-
-
Oskin, M.1
Chong, F.T.2
Farrens, M.3
-
19
-
-
84968756972
-
Picking statistically valid and early simulation points
-
Sep
-
E. Perelman, G. Hamerly, and B. Calder. Picking statistically valid and early simulation points. In PACT, Sep 2003.
-
(2003)
PACT
-
-
Perelman, E.1
Hamerly, G.2
Calder, B.3
-
21
-
-
0036953769
-
Automatically characterizing large scale program behavior
-
T. Sherwood, E. Perelman, G. Hamerly, and B. Calder. Automatically characterizing large scale program behavior. In ASPLOS-10, pages 45-57, 2002.
-
(2002)
ASPLOS-10
, pp. 45-57
-
-
Sherwood, T.1
Perelman, E.2
Hamerly, G.3
Calder, B.4
-
24
-
-
2642575180
-
A co-phase matrix to guide simultaneous multithreading simulation
-
Mar.
-
M. Van Biesbrouck, T. Sherwood, and B. Calder. A co-phase matrix to guide simultaneous multithreading simulation. In ISPASS, Mar. 2004.
-
(2004)
ISPASS
-
-
Van Biesbrouck, M.1
Sherwood, T.2
Calder, B.3
-
25
-
-
33744462550
-
TurboSMARTS: Accurate microarchitecture simulation sampling in minutes
-
Computer Architecture Lab at Carnegie Mellon (CALCM)
-
T. F. Wenisch, R. E. Wunderlich, B. Falsafi, and J. C. Hoe. TurboSMARTS: Accurate microarchitecture simulation sampling in minutes. Technical Report 2004-3, Computer Architecture Lab at Carnegie Mellon (CALCM), 2004.
-
(2004)
Technical Report
, vol.2004
, Issue.3
-
-
Wenisch, T.F.1
Wunderlich, R.E.2
Falsafi, B.3
Hoe, J.C.4
-
27
-
-
0038346244
-
SMARTS: Accelerating microarchitecture simulation via rigorous statistical sampling
-
June
-
R. Wunderlich et al. SMARTS: Accelerating microarchitecture simulation via rigorous statistical sampling. In ISCA-30, June 2003.
-
(2003)
ISCA-30
-
-
Wunderlich, R.1
-
28
-
-
12444339819
-
Bigsim: A parallel simulator for performance prediction of extremely large parallel machines
-
Santa Fe, NM, April
-
G. Zheng, G. Kakulapati, and L. V. Kalé. Bigsim: A parallel simulator for performance prediction of extremely large parallel machines. In IPDPS-18, Santa Fe, NM, April 2004.
-
(2004)
IPDPS-18
-
-
Zheng, G.1
Kakulapati, G.2
Kalé, L.V.3
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