Efficiently Evaluating Speedup Using Sampled Processor Simulation

IEEE Computer Architecture Letters

Volumn 3, Issue 1, 2004, Pages 6-

  Luo, Yue ^a   John, Lizy K ^a  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 85008034312     PISSN: 15566056     EISSN: None     Source Type: Journal    
DOI: 10.1109/L-CA.2004.6     Document Type: Article

References (14)

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