Measuring program similarity: Experiments with SPEC CPU benchmark suites

ISPASS 2005 - IEEE International Symposium on Performance Analysis of Systems and Software

Volumn 2005, Issue , 2005, Pages 10-20

  Phansalkar, Aashish ^a   Joshi, Ajay ^a   Eeckhout, Lieven ^b   John, Lizy K ^a  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

^b GHENT UNIVERSITY   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

CPU2000 BENCHMARK SUITE; MICROARCHITECTURE; SUPERSCALAR PROCESSOR CONFIGURATIONS;

BENCHMARKING; BUFFER STORAGE; COMPUTER ARCHITECTURE; DATA ACQUISITION; DISTRIBUTED COMPUTER SYSTEMS;

PROGRAM PROCESSORS;

EID: 33646503805     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPASS.2005.1430555     Document Type: Conference Paper

References (33)

1. A. Jain and R. Dubes, Algorithms for Clustering Data, Prentice Hall, 1988.
2. D. Citron, "MisSPECulation: Partial and Misleading Use of SPEC CPU2000 in Computer Architecture Conferences", Proc. of International Symposium on Computer Architecture, pp. 52-61, 2003.
3. D. Noonburg and J. Shen, "A Framework for Statistical Modeling of Superscalar Processor Performance", Proc. of International Symposium on High Performance Computer Architecture, 1997, pp. 298-309.
4. E. Sorenson and J.Flanagan, "Cache Characterization Surfaces and Prediction of Workload Miss Rates", Proc. of International Workshop on Workload Characterization, pp. 129-139, Dec 2001.
5. E. Sorenson and J.Flanagan, "Evaluating Synthetic Trace Models Using Locality Surfaces", Proceedings of the Workshop on Workload Characterization, pp. 23-33, November 2002.
6. G. Dunteman, Principal Component Analysis, Sage Publications, 1989.
7. H. Vandierendonck, K. Bosschere, "Many Benchmarks Stress the Same Bottlenecks", Proc. of the Workshop on Computer Architecture Evaluation using Commerical Workloads (CAECW-7), pp. 57-71, 2004.
8. Hammerstrom, Davdison, "Information content of CPU memory referencing behavior", Proc. of International Symposium on Computer Architecture, pp. 184-192, 1977.
9. J. Dujmovic and I. Dujmovic, "Evolution and Evaluation of SPEC benchmarks", ACM SIGMETRICS Performance Evaluation Review, vol. 26, no. 3, pp. 2-9, 1998.
10. J. Henning, "SPEC CPU2000: Measuring CPU Performance in the New Millenium", IEEE Computer, July 2000.
11. J. Spim and P. Denning, "Experiments with Program Locality", The Fall Joint Conference, pp. 611-621, 1972.
12. J.Yi, D. Lilja, and D.Hawkins, "A Statistically Rigorous Approach for Improving Simulation Methodology", Proc. of Intl Conf on High-Perf Comp Arch, ,2003.
13. K. Dixit, "Overview of the SPEC benchmarks", The Benchmark Handbook, Ch. 9,Morgan Kaufmann Publishers, 1998.
14. K. Skadron, M. Martonosi, D.August, M.Hill, D.Lilja, and V.Pai. "Challenges in Computer Architecture Evaluation." IEEE Computer. Aug. 2003.
15. L. Barroso, K. Ghorachorloo, and E. Bugnion, "Memory System Characterization of Commercial Workloads", Proc. of the International Symposium on Computer Architecture, pp. 3-14, 1998.
16. L. Eeckhout, H. Vandierendonck, and K. De Bosschere, "Designing computer architecture research workloads", IEEE Computer, 36(2), pp. 65-71, Feb 2003.
17. L. Eeckhout, H. Vandierendonck, and K. De Bosschere, "Quantifying the impact of input data sets on program behavior and its applications", Journal of Instruction Level Parallelism, vol 5, pp. 1-33, 2003.
18. L. John, P. Vasudevan and J. Sabarinathan, "Workload Characterization: Motivation, Goals and methodology", In L. K. John and A. M. G. Maynard (Eds), Workload Characterization: Methodology and Case Studies
19. L. John, V. Reddy, P. Hulina, and L. Coraor, "Program Balance and its impact on High Performance RISC Architecture", Proc. of the International Symposium on High Perf Comp Arch, pp.370-379, Jan 1995.
20. N. Mirghafori, M. Jacoby, and D. Patterson, "Truth in SPEC Benchmarks", Computer Architecture News vol. 23,no. 5, pp. 34-42, Dec 1995.
21. P. Denning, "The Working Set Model for Program Behavior", Communications of the ACM, vol 2, no. 5, pp. 323-333, 1968.
22. P. Dubey, G. Adams, and M. Flynn, "Instruction Window Size Trade-Offs and Characterization of Program Parallelism", IEEE Transactions on Computers, vol. 43, no. 4, pp. 431-442, 1994.
23. R. Giladi and N. Ahituv, "SPEC as a Performance Evaluation Measure", IEEE Computer, pp. 33-42, Aug 1995.
24. R. Saveedra and A. Smith, "Analysis of benchmark characteristics and benchmark performance prediction", Proc. of ACM Transactions on Computer Systems, vol. 14, no.4, pp. 344-384, 1996.
25. R. Weicker, "An Overview of Common Benchmarks", IEEE Computer, pp. 65-75, Dec 1990.
26. S. Mukherjee, S. Adve, T. Austin, J. Emer, and P. Magnusson, "Performance Simulation Tools" , IEEE Computer, Feb 2002.
27. Standard Performance Evaluation Corporation, http://www.spec.org/ benchmarks.html.
28. T. Austin, E. Larson, and D. Ernst, "SimpleScalar: An Infrastructure for Computer System Modeling", IEEE Computer, pp. 59-67, Feb 2002.
29. T. Lafage and A. Seznec, "Choosing Representative Slices of Program Execution for Microarchitecture Simulations: A Preliminary Application to the Data Stream", Workshop on Workload Characterization (WWC-2000), Sept 2000.
30. T. Sherwood, E. Perelman, G. Hamerly, and B. Calder, "Automatically Characterizing Large Scale Program Behavior", Proc. of International Conference on Architecture Support for Programming Languages and Operating Systems, pp. 45-57, 2002.
31. T. Wenisch, R. Wunderlich, B. Falsafi, and J. Hoe, "Applying SMARTS to SPEC CPU2000", CALCM Technical Report 2003-1, Carnegie Mellon University, June 2003.
32. J. Cantin, and M. Hill, "Cache Performance for SPEC CPU 2000 Benchmarks" http://www.cs.wisc.edu/multifacet/miso/spec2000 cache-data/
33. A. Phansalkar, A. Joshi, L. Eeckhout, L. John "Measuring Program Similarity", Lab for Computer Architecture Technical Report 2005, TR-050127-01, University of Texas at Austin.