Effective post-silicon validation of system-on-chips using quick error detection

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 33, Issue 10, 2014, Pages 1573-1590

  Lin, David ^a   Hong, Ted ^a   Li, Yanjing ^a   Eswaran, S ^b   Kumar, Sharad ^b   Fallah, Farzan ^a   Hakim, Nagib ^c   Gardner, Donald S ^c   Mitra, Subhasish ^a  

^a Stanford University   (United States)

^b FREESCALE SEMICONDUCTOR INC   (United States)

^c Freescale Semiconductor ^*  (United States)

Author keywords

Electrical bug; Logic bugs; Post silicon validation; Silicon debug; Verification

Indexed keywords

ELECTRICAL BUG; LOGIC BUGS; POST-SILICON VALIDATIONS; SILICON DEBUG; SYSTEM-ON-CHIPS;

VERIFICATION;

EID: 84907476418     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2014.2334301     Document Type: Article

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