Embedded software-based self-test for programmable core-based designs

IEEE Design and Test of Computers

Volumn 19, Issue 4, 2002, Pages 18-27

  Krstic, Angela ^b   Chen, Li ^a   Lai, Wei Cheng ^b   Cheng, Kwang Ting ^b   Dey, Sujit ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b University of California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUILT-IN SELF TEST; CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; COMPUTER PROGRAM LISTINGS; DESIGN FOR TESTABILITY; DIGITAL SIGNAL PROCESSING; DIGITAL TO ANALOG CONVERSION; INTERFACES (COMPUTER); LOW PASS FILTERS; MICROPROCESSOR CHIPS; NETWORK PROTOCOLS;

PERIPHERAL COMPONENT INTERCONNECTS (PCI); VIRTUAL COMPONENT INTERFACE (VCI);

EMBEDDED SYSTEMS;

EID: 0036645652     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.2002.1018130     Document Type: Article

References (12)

1. Software-based self-testing methodology for processor cores
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4. Software-based diagnosis for processors
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6. Testing for interconnect crosstalk defects using on-chip embedded processor cores
7. Embedded-software-based approach to testing crosstalk-induced faults at on-chip buses
8. Fault modeling and simulation for crosstalk in system-on-chip interconnects
9. A self-test methodology for IP cores in bus-based programmable SoCs
10. Retargetable self-test program generation using constraint logic programming
11. Instruction-level DFT for testing processor and IP cores in system-on-a-chip
12. Signal generation using periodic single-and multi-bit sigma-delta modulated streams