Software-implemented EDAC protection against SEUs

IEEE Transactions on Reliability

Volumn 49, Issue 3, 2000, Pages 273-284

  Shirvani, Philip P ^a,b   Saxena, Nirmal R ^a,b   McCluskey, Edward J ^a,b  

^a IEEE   (United States)

^b Stanford University   (United States)

Author keywords

Commercial off the shelf (COTS) in space; Error detection and correction (EDAC); Error correcting codes (ECC); Low cost fault tolerance; Memory protection; Memory bit flips; Single event upset (SEU); Soft errors; Software implemented; Transient error

Indexed keywords

ERROR DETECTION AND CORRECTION CODES (EDAC); SINGLE-EVENT UPSETS (SEU);

COMPUTER HARDWARE; COMPUTER OPERATING SYSTEMS; COMPUTER SIMULATION; COMPUTER SOFTWARE; ERROR CORRECTION; RANDOM ACCESS STORAGE;

BINARY CODES;

EID: 0034260103     PISSN: 00189529     EISSN: None     Source Type: Journal    
DOI: 10.1109/24.914544     Document Type: Article

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