SCOPUS 정보 검색 플랫폼 - 논문 보기

메뉴 건너뛰기

Proceedings - Design Automation Conference

Volumn , Issue , 2006, Pages 7-12

A reconfigurable design-for-debug infrastructure for SoCs

(6) Abramovici, Miron a Bradley, Paul a Dwarakanath, Kumar a Levin, Peter a Memmi, Gerard a Miller, Dave a

a DAFCA Inc ^* (United States)

Author keywords

Assertion based debug; At speed debug; Silicon debug; What if experiments

Indexed keywords

DATA STRUCTURES; FUNCTIONAL ANALYSIS; PROGRAM DEBUGGING; SILICON; SOFTWARE ARCHITECTURE;

ASSERTION-BASED DEBUG; AT-SPEED DEBUG; DESIGN-FOR-DEBUG (DFD); SILICON DEBUG;

SOFTWARE DESIGN;

EID: 34547229372 PISSN: 0738100X EISSN: None Source Type: Conference Proceeding
DOI: 10.1145/1146909.1146916 Document Type: Conference Paper

Times cited : (239)

References (11)

1
- 79959863223
- A. Berent. Debugging Techniques for Embedded Systems using Real-Time Software Trace. http://www.arm.com/pdfs/CoresightWhitepaper.pdf
- Debugging Techniques for Embedded Systems using Real-Time Software Trace
- Berent, A.¹

2
- 34547157658
- An SoC with Reconfigurable Debug Infrastructure
- April
- J. Bower, O. Mencer, W. Luck, and M. Abramovici. An SoC with Reconfigurable Debug Infrastructure. Proceedings of COOL Chips IX Conf., April 2006
- (2006) Proceedings of COOL Chips IX Conf
- Bower, J.¹ Mencer, O.² Luck, W.³ Abramovici, M.⁴

3
- 85165852078
- Collett ASIC/IC Verification Study, 2004 (date for 180nm and 130nm)
- Collett ASIC/IC Verification Study, 2004 (date for 180nm and 130nm)

4
- 33847111702
- Enhancing Reliability and Flexibility of a System-on-Chip Using Reconfigurable Logic
- Aug
- Jiang, W., T. Marwah and D. Bouldin. Enhancing Reliability and Flexibility of a System-on-Chip Using Reconfigurable Logic. Proc. of the Midwest Symp. on Circuits and Systems, Aug. 2005.
- (2005) Proc. of the Midwest Symp. on Circuits and Systems
- Jiang, W.¹ Marwah, T.² Bouldin, D.³

5
- 0043136708
- Advanced Techniques for RTL Debugging
- June
- th Design Automation Conf., June, 2003.
- (2003) th Design Automation Conf
- Hsu, Y.¹ Tabbara, B.² Chen, Y.³ Tsai, F.⁴

6
- 34547200670
- Visibility Enhancement for Silicon Debug
- rd Design Automation Conf., July, 2006.
- rd Design Automation Conf., July, 2006
- Hsu, Y.¹

7
- 0038349193
- Architectures and Algorithms for Synthesizable Embedded Programmable Logic Cores
- Febr
- N. Kafafi, K. Bozman, and S.J.E. Wilton. Architectures and Algorithms for Synthesizable Embedded Programmable Logic Cores. Proc. ACM/SIGDA Intn'l. Symp. on FPGAs, Febr. 2003
- (2003) Proc. ACM/SIGDA Intn'l. Symp. on FPGAs
- Kafafi, N.¹ Bozman, K.² Wilton, S.J.E.³

8
- 85165835577
- Processor and System Bus On-Chip Instrumentation
- April
- R. Leatherman, B. Ableidinger, and N. Stollon. Processor and System Bus On-Chip Instrumentation. Proc. Embedded Systems Conference, April 2003.
- (2003) Proc. Embedded Systems Conference
- Leatherman, R.¹ Ableidinger, B.² Stollon, N.³

9
- 0038349193
- Architectures and Algorithms for Synthesizable Embedded Programmable Logic Cores
- Febr
- N. Kafafi, K. Bozman, and S.J.E. Wilton. Architectures and Algorithms for Synthesizable Embedded Programmable Logic Cores. Proc. ACM/SIGDA Intn'l. Symp. on FPGAs, Febr. 2003
- (2003) Proc. ACM/SIGDA Intn'l. Symp. on FPGAs
- Kafafi, N.¹ Bozman, K.² Wilton, S.J.E.³

10
- 0036575031
- Design for Debug: Catching Design Errors in Digital Chips
- May/June
- B. Vermeulen and S.K. Goel. Design for Debug: Catching Design Errors in Digital Chips. IEEE Design & Test of Computers, May/June 2002
- (2002) IEEE Design & Test of Computers
- Vermeulen, B.¹ Goel, S.K.²

11
- 85165861939
- http://www.accellera.org/activities/ovl/

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.