Post-silicon validation challenges: How EDA and academia can help

Proceedings - Design Automation Conference

Volumn , Issue , 2010, Pages 3-7

  Keshava, Jagannath ^a   Hakim, Nagib ^a   Prudvi, Chinna ^a  

^a INTEL CORPORATION   (United States)

Author keywords

Design; Emulation; Test; Validation; Verification

Indexed keywords

CIRCUIT COMPLEXITY; CONTENT DEVELOPMENT; ELECTRONIC DESIGN AUTOMATION; EMULATION; HOLISTIC APPROACH; LAUNCH SCHEDULES; PERFORMANCE REQUIREMENTS; POST-SILICON; POST-SILICON DEBUG; PREDICTIVE TOOLS; STANDARD INTERFACE; TEST; VALIDATION; VALIDATION PROCESS;

AUTOMATION; COMPUTER AIDED DESIGN; STANDARDIZATION;

BRIDGES;

EID: 77956193830     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1837274.1837278     Document Type: Conference Paper

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