Native mode functional test generation for processors with applications to self test and design validation

IEEE International Test Conference (TC)

Volumn , Issue , 1998, Pages 990-999

  Shen, Jian ^a   Abraham, Jacob A ^a  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC FUNCTIONAL TEST GENERATION METHODOLOGY;

AUTOMATIC TESTING; BUILT-IN SELF TEST; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING;

MICROPROCESSOR CHIPS;

EID: 0032306939     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/TEST.1998.743296     Document Type: Conference Paper

References (28)