-
1
-
-
0031212918
-
Flash memory cells-An overview
-
Aug.
-
P. Pavan, R. Bez, P. Olivo, and E. Zanonim, "Flash memory cells-An overview," Proc. IEEE, vol.85, no.8, pp. 1248-1271, Aug. 1997.
-
(1997)
Proc. IEEE
, vol.85
, Issue.8
, pp. 1248-1271
-
-
Pavan, P.1
Bez, R.2
Olivo, P.3
Zanonim, E.4
-
2
-
-
28744456880
-
High-κ materials for non-volatile memory applications
-
J. Van Houdt, "High-κ materials for non-volatile memory applications," in Proc. IRPS, 2005, pp. 234-239.
-
(2005)
Proc. IRPS
, pp. 234-239
-
-
Van Houdt, J.1
-
3
-
-
28044445399
-
Scaling down the interpoly dielectric for next generation flash memory: Challenges and opportunities
-
Nov.
-
B. Govoreanu, D. P. Brunco, and J. Van Houdt, "Scaling down the interpoly dielectric for next generation flash memory: Challenges and opportunities," Solid State Electron., vol.49, no.11, pp. 1841-1848, Nov. 2005.
-
(2005)
Solid State Electron.
, vol.49
, Issue.11
, pp. 1841-1848
-
-
Govoreanu, B.1
Brunco, D.P.2
Van Houdt, J.3
-
5
-
-
0000090297
-
Layered tunnel barriers for nonvolatile memory devices
-
Oct.
-
K. K. Likharev, "Layered tunnel barriers for nonvolatile memory devices," Appl. Phys. Lett., vol.73, no.15, pp. 2137-2139, Oct. 1998.
-
(1998)
Appl. Phys. Lett.
, vol.73
, Issue.15
, pp. 2137-2139
-
-
Likharev, K.K.1
-
6
-
-
3242669114
-
Aluminum oxide layers as possible components for layered tunnel barriers
-
Jul.
-
E. Cimpoiasu, S. K. Tolpygo, X. Liu, N. Simonian, J. E. Lukens, and K. K. Likharev, "Aluminum oxide layers as possible components for layered tunnel barriers," J. Appl. Phys., vol.96, no.2, pp. 1088-1093, Jul. 2004.
-
(2004)
J. Appl. Phys.
, vol.96
, Issue.2
, pp. 1088-1093
-
-
Cimpoiasu, E.1
Tolpygo, S.K.2
Liu, X.3
Simonian, N.4
Lukens, J.E.5
Likharev, K.K.6
-
8
-
-
0042387927
-
3 IPD with NH3 surface nitridation
-
Aug.
-
3 IPD with NH3 surface nitridation," IEEE Electron Device Lett., vol.24, no.8, pp. 503-505, Aug. 2003.
-
(2003)
IEEE Electron Device Lett.
, vol.24
, Issue.8
, pp. 503-505
-
-
Chen, Y.Y.1
Chien, C.H.2
Lou, J.C.3
-
9
-
-
84943200660
-
3-based flash interpoly dielectrics: A comparative retention study
-
Montreux, Switzerland
-
3-based flash interpoly dielectrics: A comparative retention study," in Proc. ESSDERC, Montreux, Switzerland, 2006, pp. 238-241.
-
(2006)
Proc. ESSDERC
, pp. 238-241
-
-
Wellekens, D.1
Blomme, P.2
Govoreanu, B.3
De Vos, J.4
Haspeslagh, L.5
Van Houdt, J.6
Brunco, D.P.7
Van Der Zanden, K.8
-
10
-
-
84957888455
-
3 tunnel oxide
-
Montreux, Switzerland
-
3 tunnel oxide," in Proc. ESSDERC, Montreux, Switzerland, 2006, pp. 246-249.
-
(2006)
Proc. ESSDERC
, pp. 246-249
-
-
Buckley, J.1
Molas, G.2
Gély, M.3
Martin, F.4
De Salvo, B.5
Deleonibus, S.6
Pananakakis, G.7
Bongiorno, C.8
Lombardo, S.9
-
11
-
-
84943197764
-
3 and HfSiON for use as interpoly dielectric in flash arrays
-
Montreux, Switzerland
-
3 and HfSiON for use as interpoly dielectric in flash arrays," in Proc. ESSDERC, Montreux, Switzerland, 2006, pp. 234-237.
-
(2006)
Proc. ESSDERC
, pp. 234-237
-
-
Miranda, A.H.1
Van Schaijk, R.2
Van Duuren, M.3
Akil, N.4
Golubovi, D.S.5
-
12
-
-
0038732556
-
VARIOT: A novel multilayer tunnel barrier concept for low-voltage nonvolatile memory devices
-
Feb.
-
B. Govoreanu, P. Blomme, M. Rosmeulen, J. Van Houdt, and K. De Meyer, "VARIOT: A novel multilayer tunnel barrier concept for low-voltage nonvolatile memory devices," IEEE Electron Device Lett., vol.24, no.2, pp. 99-101, Feb. 2003.
-
(2003)
IEEE Electron Device Lett.
, vol.24
, Issue.2
, pp. 99-101
-
-
Govoreanu, B.1
Blomme, P.2
Rosmeulen, M.3
Van Houdt, J.4
De Meyer, K.5
-
13
-
-
0035716168
-
Ultrathin high-κ gate stacks for advanced CMOS devices
-
E. Gusev, D. Buchanan, E. Cartier, A. Kumar, D. DiMaria, S. Guha, A. Callegari, S. Zafar, P. Jamison, D. Neumayer, M. Copel, M. Gribelyuk, H. Okorn-Schmidt, C. D'Emic, P. Kozlowski, K. Chan, N. Bojarczuk, L.-Å. Ragnarsson, P. Ronsheim, K. Rim, R. Fleming, A. Mocuta, and A. Ajmera, "Ultrathin high-κ gate stacks for advanced CMOS devices," in IEDM Tech. Dig., 2001, pp. 451-454.
-
(2001)
IEDM Tech. Dig.
, pp. 451-454
-
-
Gusev, E.1
Buchanan, D.2
Cartier, E.3
Kumar, A.4
DiMaria, D.5
Guha, S.6
Callegari, A.7
Zafar, S.8
Jamison, P.9
Neumayer, D.10
Copel, M.11
Gribelyuk, M.12
Okorn-Schmidt, H.13
D'Emic, C.14
Kozlowski, P.15
Chan, K.16
Bojarczuk, N.17
Ragnarsson, L.-Å.18
Ronsheim, P.19
Rim, K.20
Fleming, R.21
Mocuta, A.22
Ajmera, A.23
more..
-
14
-
-
33751077867
-
An assessment of the location of as-grown electron traps in HfO2/HiSiO stacks
-
Oct.
-
J. F. Zhang, C. Z. Zhao, M. B. Zahid, G. Groeseneken, R. Degraeve, and S. De Gendt, "An assessment of the location of as-grown electron traps in HfO2/HiSiO stacks," IEEE Electron Device Lett., vol.27, no.10, pp. 817-820, Oct. 2006.
-
(2006)
IEEE Electron Device Lett.
, vol.27
, Issue.10
, pp. 817-820
-
-
Zhang, J.F.1
Zhao, C.Z.2
Zahid, M.B.3
Groeseneken, G.4
Degraeve, R.5
De Gendt, S.6
-
15
-
-
0036927918
-
Charge trapping in high-κ gate dielectric stacks
-
S. Zafar, A. Callegari, E. Gusev, and M. V. Fischetti, "Charge trapping in high-κ gate dielectric stacks," in IEDM Tech. Dig., 2002, pp. 517-520.
-
(2002)
IEDM Tech. Dig.
, pp. 517-520
-
-
Zafar, S.1
Callegari, A.2
Gusev, E.3
Fischetti, M.V.4
-
16
-
-
46049118849
-
Investigation of the low-field leakage through high-κ interpoly dielectric stacks and its impact on nonvolatile memory data retention
-
B. Govoreanu, D.Wellekens, L. Haspeslagh, J. De Vos, and J. Van Houdt, "Investigation of the low-field leakage through high-κ interpoly dielectric stacks and its impact on nonvolatile memory data retention," in IEDM Tech. Dig., 2006, pp. 206-209.
-
(2006)
IEDM Tech. Dig.
, pp. 206-209
-
-
Govoreanu, B.1
Wellekens, D.2
Haspeslagh, L.3
De Vos, J.4
Van Houdt, J.5
-
17
-
-
34247117334
-
3 gate stacks
-
Apr./May
-
3 gate stacks," Microelectron. Reliab., vol. 47, no. 4/5, pp. 525-527, Apr./May 2007.
-
(2007)
Microelectron. Reliab.
, vol.47
, Issue.4-5
, pp. 525-527
-
-
Crupi, I.1
Degraeve, R.2
Govoreanu, B.3
Brunco, D.P.4
Roussel, P.J.5
Van Houdt, J.6
-
20
-
-
34249906151
-
2 gate stack
-
Jun.
-
2 gate stack," IEEE Trans. Electron Devices, vol.54, no.6, pp. 1338-1345, Jun. 2007.
-
(2007)
IEEE Trans. Electron Devices
, vol.54
, Issue.6
, pp. 1338-1345
-
-
Heh, D.1
Young, C.D.2
Brown, G.A.3
Hung, P.Y.4
Diebold, A.5
Vogel, E.M.6
Joseph, B.7
Bersuker, G.8
-
21
-
-
46049104943
-
Frequency dependent charge-pumping, how deep does it probe?
-
Y. Wang, V. Lee, and K. P. Cheung, "Frequency dependent charge-pumping, how deep does it probe?," in IEDM Tech. Dig., 2006, pp. 491-494.
-
(2006)
IEDM Tech. Dig.
, pp. 491-494
-
-
Wang, Y.1
Lee, V.2
Cheung, K.P.3
-
22
-
-
33845596252
-
3 nMOSFETs
-
Dec.
-
3 nMOSFETs," IEEE Trans. Device Mater. Rel., vol.6, no.4, pp. 509-516, Dec. 2006.
-
(2006)
IEEE Trans. Device Mater. Rel.
, vol.6
, Issue.4
, pp. 509-516
-
-
Crupi, I.1
Degraeve, R.2
Govoreanu, B.3
Brunco, D.P.4
Roussel, P.J.5
Van Houdt, J.6
-
23
-
-
0030270348
-
2 interface
-
Oct.
-
2 interface," J. Appl. Phys., vol.80, no.7, pp. 3915-3922, Oct. 1996.
-
(1996)
J. Appl. Phys.
, vol.80
, Issue.7
, pp. 3915-3922
-
-
Uren, M.J.1
Stathis, J.H.2
Cartier, E.3
-
24
-
-
33751112213
-
Determination of capture cross sections for as-grown electron traps in HfO2/HfSiO stacks
-
C. Z. Zhao, J. F. Zhang, M. B. Zahid, B. Govoreanu, G. Groeseneken, and S. De Gendt, "Determination of capture cross sections for as-grown electron traps in HfO2/HfSiO stacks," J. Appl. Phys., vol.100, no.9, p. 093716, 2006.
-
(2006)
J. Appl. Phys.
, vol.100
, Issue.9
, pp. 093716
-
-
Zhao, C.Z.1
Zhang, J.F.2
Zahid, M.B.3
Govoreanu, B.4
Groeseneken, G.5
De Gendt, S.6
-
25
-
-
0037972997
-
2/HfO2 gate dielectrics
-
2/HfO2 gate dielectrics," in Proc. IRPS, 2003, pp. 41-45.
-
(2003)
Proc. IRPS
, pp. 41-45
-
-
Kerber, A.1
Cartier, E.2
Pantisano, L.3
Rosmeulen, M.4
Degraeve, R.5
Kauerauf, T.6
Groeseneken, G.7
Maes, H.E.8
Schwalke, U.9
-
26
-
-
0001456937
-
2 prepared by plasma and thermal oxidation
-
Aug.
-
2 prepared by plasma and thermal oxidation," J. Appl. Phys., vol.72, no.4, pp. 1429-1439, Aug. 1992.
-
(1992)
J. Appl. Phys.
, vol.72
, Issue.4
, pp. 1429-1439
-
-
Zhang, J.F.1
Taylor, S.2
Eccleston, W.3
-
27
-
-
0036865978
-
Two types of neutral electron traps generated in the gate silicon dioxide
-
Nov.
-
W. D. Zhang, J. F. Zhang, R. Degraeve, and G. Groeseneken, "Two types of neutral electron traps generated in the gate silicon dioxide," IEEE Trans. Electron Devices, vol.49, no.11, pp. 1868-1875, Nov. 2002.
-
(2002)
IEEE Trans. Electron Devices
, vol.49
, Issue.11
, pp. 1868-1875
-
-
Zhang, W.D.1
Zhang, J.F.2
Degraeve, R.3
Groeseneken, G.4
-
28
-
-
0018031993
-
2 layer of MOS structures using Photo IV technique
-
Nov.
-
2 layer of MOS structures using Photo IV technique," J. Appl. Phys., vol.49, no.11, pp. 5441-5444, Nov. 1978.
-
(1978)
J. Appl. Phys.
, vol.49
, Issue.11
, pp. 5441-5444
-
-
Dimaria, D.J.1
Young, D.R.2
Dekeersmaecker, R.F.3
Hunter, W.R.4
Serrano, C.M.5
-
29
-
-
50949125375
-
2/high-κ dielectric stacks
-
Sep.
-
2/high-κ dielectric stacks," IEEE Electron Device Lett., vol.29, no.9, pp. 1043-1046, Sep. 2008.
-
(2008)
IEEE Electron Device Lett.
, vol.29
, Issue.9
, pp. 1043-1046
-
-
Zhang, W.D.1
Govoreanu, B.2
Zheng, X.F.3
Ruiz Aguado, D.4
Rosmeulen, M.5
Blomme, P.6
Zhang, J.F.7
Van Houdt, J.8
-
30
-
-
0022667218
-
2-induced substrate current and its relation to positive charge in field-effect transistors
-
Feb.
-
2-induced substrate current and its relation to positive charge in field-effect transistors," J. Appl. Phys., vol.59, no.3, pp. 824-832, Feb. 1986.
-
(1986)
J. Appl. Phys.
, vol.59
, Issue.3
, pp. 824-832
-
-
Weinberg, Z.A.1
Fischetti, M.V.2
-
31
-
-
84907709957
-
Electrical characterization of silicon-rich-oxide-based memory cells using pulsed current-voltage techniques
-
M. Rosmeulen, E. Sleeckx, and K. De Meyer, "Electrical characterization of silicon-rich-oxide-based memory cells using pulsed current-voltage techniques," in Proc. Eur. Solid-State Device Res. Conf., 2002, pp. 471-474.
-
(2002)
Proc. Eur. Solid-State Device Res. Conf.
, pp. 471-474
-
-
Rosmeulen, M.1
Sleeckx, E.2
De Meyer, K.3
-
32
-
-
34247119697
-
3 dielectric stacks by pulsed C-V technique
-
Apr./May
-
3 dielectric stacks by pulsed C-V technique," Microelectron. Reliab., vol. 47, no. 4/5, pp. 508-512, Apr./May 2007.
-
(2007)
Microelectron. Reliab.
, vol.47
, Issue.4-5
, pp. 508-512
-
-
Puzzilli, G.1
Govoreanu, B.2
Irrera, F.3
Rosmeulen, M.4
Van Houdt, J.5
-
33
-
-
0442311955
-
An effective model for tunneling through ultrathin oxides/high-k gate stacks from silicon inversion layers and the impact of the stack parameters on the leakage current
-
B. Govoreanu, P. Blomme, K. Henson, J. Van Houdt, and K. De Meyer, "An effective model for tunneling through ultrathin oxides/high-k gate stacks from silicon inversion layers and the impact of the stack parameters on the leakage current," Solid State Electron., vol.48, no.4, pp. 617-625, 2004.
-
(2004)
Solid State Electron.
, vol.48
, Issue.4
, pp. 617-625
-
-
Govoreanu, B.1
Blomme, P.2
Henson, K.3
Van Houdt, J.4
De Meyer, K.5
-
34
-
-
19944423819
-
3 dielectrics
-
3 dielectrics," Microelectron. Eng., vol.80, pp. 210-213, 2005.
-
(2005)
Microelectron. Eng.
, vol.80
, pp. 210-213
-
-
Buckley, J.1
De Salvo, B.2
Deleruyelle, D.3
Gely, M.4
Nicotra, G.5
Lombardo, S.6
Damlencourt, J.F.7
Hollinger, P.8
Martin, F.9
Deleonibus, S.10
-
35
-
-
31044455312
-
High dielectric constant gate oxides for metal oxide Si transistors
-
Feb.
-
J. Robertson, "High dielectric constant gate oxides for metal oxide Si transistors," Rep. Prog. Phys., vol.69, no.2, pp. 327-396, Feb. 2006.
-
(2006)
Rep. Prog. Phys.
, vol.69
, Issue.2
, pp. 327-396
-
-
Robertson, J.1
|