An assessment of the location of as-grown electron traps in HfO2/HfSiO stacks

IEEE Electron Device Letters

Volumn 27, Issue 10, 2006, Pages 817-820

  Zhang, J F ^a   Zhao, C Z ^a   Zahid, M B ^a   Groeseneken, G ^b,c   Degraeve, R ^b   De Gendt, S ^b,c  

^a LIVERPOOL JOHN MOORES UNIVERSITY   (United Kingdom)

^b IMEC   (Belgium)

^c UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

Defects; Gate dielectrics; High ; Instability; Oxides; Reliability; Traps

Indexed keywords

AS-GROWN; CMOS TECHNOLOGIES; INSTABILITY; TEST CONDITIONS; TEST DATUM; TRAPS; UNIFORM DISTRIBUTIONS; VOLTAGE INSTABILITIES;

ELECTRON MOBILITY; ELECTRON TRAPS; GATE DIELECTRICS; GATES (TRANSISTOR); MOS CAPACITORS;

HAFNIUM COMPOUNDS;

EID: 33751077867     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2006.882566     Document Type: Article

References (14)

1. G. Groeseneken, L. Pantisano, L.-A. Ragnarsson, R. Degraeve, M. Houssa, T. Kauerauf, P. Roussel, S. De Gendt, and M. Heyns, "Achievements and challenges for the electrical performance of MOSFET's with high-κ, gate dielectrics," in Proc. 11th Int. Symp. Phys. and Failure Anal IC, 2004, pp. 147-155.
2. T. P. Ma, H. M. Bu, X. W. Wang, L. Y. Song, W. He, M. Wang, H.-H. Tseng, and P. J. Tobin, "Special reliability features for Hf-based high-κ, gate dielectrics," IEEE trans. Device Mater. Rel., vol. 5, no. 1, no. 36-44. Mar. 2005.
3. 2 reliability and yield," in IEDM Tech. Dig., 2003, pp. 935-938.
4. W. D. Zhang, J. F. Zhang, M. Lalor, D. Burton, G. Uroeseneken, and R. Degraeve, "Two types of neutral electron traps generated in the gate silicon dioxide," IEEE Trans. Electron Dev., Vol. 49, no. 11, pp. 1868-1875, Nov. 2002.
5. 2 stacks," Microelectron Eng. vol. 80, pp. 366-369, Jun. 2005.
6. G. Reimbold, J. Mitard, M. Casse, X. Carros, C. Leroux, L. Thevenod, and F. Martin, "Electrical characterization of high-κ, devices: Charges and traps effects on instability, reliability and mobility behaviour," in Proc. Silicon Nitride, Silicon Dioxide Thin insulating Films, and Other Emerging Dielectr. VIII, 2005, pp. 437-455.
7. 2 high-κ, MOS capacitors using internal photoemission," Microelectron. Eng., vol. 880, pp. 58-61, Jun. 2005.
8. 2/TaN and SiON/TaN nMOS transistors," Microelectron. Reliab., vol. 45, pp. 779-782, 2005.
9. 2 gate dielectrics," in Proc. 41st Annu. Int. Reliab. Phys. Symp., 2003, pp. 41-45.
10. J. F. Zhang, H. K. Sii, G. Groeseneken, and R. Degraeve, "Hole trapping and trap generation in the gate silicon dioxide," IEEE Trans. Electron Dev. vol. 48, no. 6, pp. 1127-1135, Jun. 2001.
11. 3 gate dielectric stacks," Appl. Phys. Lett., vol. 80, no. 11, pp. 1975-1977, Mar. 2002.
12. 2 thickness on charge trapping and mobility," Microelectron. Eng., vol. 80, pp. 218-221, 2005.
13. S. M Sze, Physics of Semiconductor Devices, 2nd ea. New York: Wiley, 1981, pp. 390-395.
14. 2 gate stacks," Appl. Phys. Lett., vol. 88, no. 15, pp. 152-907, Apr. 2006.