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2, oxide breakdown and reliability, MOS measurement techniques, thin oxide properties, and nonvolatile memories characterization. In the field of 1C design and testing, he has worked on signature analysis testing, design for testability techniques, fault modeling and fault simulation, IDDQ testing, self-checking circuits, and nonvolatile memory testing. Enrico Zanoni (Senior Member, IEEE) was bom in Legnago, Verona, Italy in 1956. He received the doctoral degree in physics from the University of Modena, Italy, in 1982. He has worked on the characterization of electronic components for telecommunication systems and automotive electronics systems. His research interests include the study of the reliability of Si electron devices and of nonvolatile memories, the characterization of hot-electron phenomena in III-V devices. On these (and related) subjects, he has coauthored approximately 150 papers published in international journals and conference proceedings, ten invited papers, and five book chapters. He has collaborated with several electronics companies, including Alcatel, AT&T Bell Labs (now Lucent Technologies), CNET-France Telecom, Hughes Research Laboratories, IBM T. J. Watson Research Center, Marelli Autronica, NECSY, Siemens, and TRW. Since 1993, he has been a full Professor of Electronics at the Univeristy of Padova, Italy. He has participated in the past in the establishment of a laboratory devoted to the evaluation of quality and reliability of electronic components in Bari, Italy.
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