|
Volumn 48, Issue 4, 2004, Pages 617-625
|
An effective model for analysing tunneling gate leakage currents through ultrathin oxides and high-k gate stacks from Si inversion layers
|
Author keywords
Gate dielectric scalability; High k dielectrics; Inversion layer; Quasibound state lifetime; Tunneling current
|
Indexed keywords
DIELECTRIC MATERIALS;
ELECTRON TUNNELING;
INTERFACES (MATERIALS);
LEAKAGE CURRENTS;
OXIDES;
PERMITTIVITY;
GATE DIELECTRIC SCALABILITY;
HIGH-K DIELECTRICS;
INVERSION LAYER;
QUASIBOUND STATE LIFETIME;
TUNNELING CURRENT;
MOS DEVICES;
|
EID: 0442311955
PISSN: 00381101
EISSN: None
Source Type: Journal
DOI: 10.1016/j.sse.2003.09.031 Document Type: Conference Paper |
Times cited : (28)
|
References (25)
|