Recent issues in negative-bias temperature instability: Initial degradation, field dependence of interface trap generation, hole trapping effects, and relaxation

IEEE Transactions on Electron Devices

Volumn 54, Issue 9, 2007, Pages 2143-2154

  Islam, Ahmad Ehteshamul ^a   Kufluoglu, Haldum ^a   Varghese, Dhannop ^a   Mahapatra, Souvik ^b   Alam, Muhammad Ashraful ^a  

^a PURDUE UNIVERSITY   (United States)

^b INDIAN INSTITUTE OF TECHNOLOGY BOMBAY   (India)

Author keywords

Fast transient recovery; Field acceleration; Hole trapping; Interface traps; Negative bias temperature instability (NBTI); Reaction diffusion (R D) model; Time exponent

Indexed keywords

GATE DIELECTRICS; HOLE TRAPS; TEMPERATURE; THIN FILMS; THRESHOLD VOLTAGE;

FAST TRANSIENT RECOVERY; INTERFACE TRAP GENERATION; NEGATIVE-BIAS TEMPERATURE INSTABILITY (NBTI); REACTION-DIFFUSION (R-D) MODEL; TIME EXPONENT;

ELECTRON TRAPS;

EID: 40549122135     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2007.902883     Document Type: Article

References (54)

1. B. E. Deal, M. Sklar, A. S. Grove, and E. H. Snow, "Characteristics of surface-state charge (Qss) of thermally oxidized silicon," J. Electrochem. Soc., vol. 114, no. 3, pp. 266-274, Mar. 1967.
2. M. A. Alam and S. Mahapatra, "A comprehensive model of PMOS NBTI degradation," Microelectron. Reliab., vol. 45, no. 1, pp. 71-81, Jan. 2005.
3. D. K. Schroder and J. A. Babcock, "Negative bias temperature instability: Road to cross in deep submicron silicon semiconductor manufacturing," J. Appl. Phys., vol. 94, no. 1, pp. 1-18, Jul. 2003.
4. S. Chakravarthi, A. Krishnan, V. Reddy, C. F. Machala, and S. Krishnan, "A comprehensive framework for predictive modeling of negative bias temperature instability," in Proc. IEEE IRPS, 2004, pp. 273-282.
5. V. Huard, M. Denais, F. Perrier, N. Revil, C. Parthasarathy, A. Bravaix, and E. Vincent, "A thorough investigation of MOSFETs NBTI degradation," Microelectron. Reliab., vol. 45, no. 1, pp. 83-98, Jan. 2005.
6. B. Kaczer, V. Arkhipov, R. Degraeve, N. Collaert, G. Groeseneken, and M. Goodwin, "Disorder-controlled-kinetics model for negative bias temperature instability and its experimental verification," in Proc. IEEE IRPS, 2005, pp. 381-387.
7. M. A. Alam, H. Kufluoglu, D. Varghese, and S. Mahapatra, "A comprehensive model for PMOS NBTI degradation: Recent progress," Microelectron. Reliab., vol. 47, no. 6, pp. 853-862, Jun. 2007.
8. International Technology Roadmap for Semiconductors, 2005.
9. S. S. Tan, T. P. Chen, J. M. Soon, K. P. Loh, C. H. Ang, and L. Chan, "Nitrogen-enhanced negative bias temperature instability: An insight by experiment and first-principle calculations," Appl. Phys. Lett., vol. 82, no. 12, pp. 1881-1883, Mar. 2003.
10. Y. Mitani, "Influence of nitrogen in ultra-thin SiON on negative bias temperature instability under AC stress," in IEDM Tech. Dig., 2004, pp. 117-120.
11. 2 and Si-O-N gate dielectric layers for silicon microelectronics: Understanding the processing, structure, and physical and electrical limits," J. Appl. Phys., vol. 90, no. 5, pp. 2057-2121, Sep. 2001.
12. A. T. Krishnan, S. Chakravarthi, P. Nicollian, V. Reddy, and S. Krishnan, "Negative bias temperature instability mechanism: The role of molecular hydrogen," Appl. Phys. Lett., vol. 88, no. 15, p. 153-518, Apr. 2006.
13. J. R. Shallenberger, D. A. Cole, and S. W. Novak, "Characterization of silicon oxynitride thin films by X-ray photoelectron spectroscopy," J. Vac. Sci. Technol. A, Vac. Surf. Films, vol. 17, no. 4, pp. 1086-1090, Jul. 1999.
14. K. O. Jeppson and C. M. Svensson, "Negative bias stress of mos devices at high electric-fields and degradation of Mnos devices," J. Appl. Phys., vol. 48, no. 5, pp. 2004-2014, May 1977.
15. G. Gupta, S. Mahapatra, L. Madhav, D. Varghese, K. Ahmed, and F. Nouri, "Interface-trap driven NBTI for ultrathin (EOT ∼ 12Å) plasma and thermal nitrided oxynitrides," in Proc. IEEE IRPS, 2006, pp. 731-732.
16. D. Varghese, D. Saha, S. Mahapatra, K. Ahmed, F. Nouri, and M. A. Alam, "On the dispersive versus Arrhenius temperature activation of NBTI time evolution in plasma nitrided gate oxides: Measurements, theory, and implications," in IEDM Tech. Dig., 2005, pp. 684-687.
17. A. T. Krishnan, C. Chancellor, S. Chakravarthi, P. E. Nicollian, V. Reddy, A. Varghese, R. B. Khamankar, S. Krishnan, and L. Levitov, "Material dependence of hydrogen diffusion: Implications for NBTI degradation," in IEDM Tech. Dig., 2005, pp. 688-691.
18. A. E. Islam, G. Gupta, S. Mahapatra, A. Krishnan, K. Ahmed, F. Nouri, A. Oates, and M. A. Alam, "Gate leakage vs. NBTI in plasma nitrided oxides: Characterization, physical principles, and optimization," in IEDM Tech. Dig., 2006, p. 12.4.1.
19. T measurements," in Proc. IEEE IRPS, 2006, pp. 448-453.
20. C. L. Chen, Y. M. Lin, C. J. Wang, and K. Wu, "A new finding on NBTI lifetime model and an investigation on NBTI degradation characteristic for 1.2 nm ultra thin oxide," in Proc. IEEE IRPS, 2005, pp. 704-705.
21. N. K. Jha, P. S. Reddy, and V. R. Rao, "A new drain voltage enhanced NBTI degradation mechanism," in Proc. IEEE IRPS, 2005, pp. 524-528.
22. S. Zafar, "Statistical mechanics based model for negative bias temperature instability induced degradation," J. Appl. Phys., vol. 97, no. 10, p. 103 709, May 2005.
23. J. B. Yang, T. P. Chen, S. S. Tan, and L. Chan, "Analytical reaction-diffusion model and the modeling of nitrogen-enhanced negative bias temperature instability," Appl. Phys. Lett., vol. 88, no. 17, p. 172 109, Apr. 2006.
24. M. A. Alain, "A critical examination of the mechanics of dynamic NBTI for PMOSFETs, " in IEDM Tech. Dig., 2003, pp. 345-348.
25. S. Kumar, C. H. Kim, and S. S. Sapatnekar, "An analytical model for negative bias temperature instability," in Proc. ICCAD, 2006, p.6D.1.
26. G. Chen, M. F. Li, C. H. Ang, J. Z. Zheng, and D. L. Kwong, "Dynamic NBTI of p-MOS transistors and its impact on MOSFET scaling," IEEE Electron Device Lett., vol. 23, no. 12, pp. 734-736, Dec. 2002.
27. R. Fernández, B. Kaczer, A. Nackaerts, S. Demuynck, R. Rodríguez, M. Nafría, and G. Groeseneken, "AC NBTI studied in the 1 Hz-2 GHz range on dedicated on-chip CMOS circuits," in IEDM Tech. Dig., 2006, p.12.6.1.
28. C. Shen, M. F. Li, C. E. Foo, T. Yang, D. M. Huang, A. Yap, G. S. Samudra, and Y. C. Yeo, "Characterization and physical origin of fast Vth transient in NBTI of pMOSFETs with SiON dielectric," in IEDM Tech. Dig., 2006, p. 12.5.1.
29. S. Rangan, N. Mielke, and E. C. C. Yeh, "Universal recovery behavior of negative bias temperature instability [PMOSFETs]," in IEDM Tech. Dig., 2003, pp. 341-344.
30. C. R. Parthasarathy, M. Denais, V. Huard, G. R~bes, E. Vincent, and A. Bravaix, "New insights into recovery characteristics post NBTI stress," in Proc. IEEE IRPS, 2006, pp. 471-477.
31. T. Grasser, W. Gos, V. Sverdlov, and B. Kaczer, "The universality of NBTI relaxation and its implications for modeling and characterization," in Proc. IEEE IRPS, 2007, pp. 268-280.
32. V. Huard, C. R. Parthasarathy, C. Guerin, and M. Denais, "Physical modeling of negative bias temperature instabilities for predictive extrapolation," in Proc. IEEE IRPS, 2006, pp. 733-734.
33. S. Mahapatra, K. Ahmed, D. Varghese, A. E. Islam, G. Gupta, L. Madhav, D. Saha, M. A. Alain, "On the physical mechanism of NBTI in silicon oxynitride p-MOSFETs: Can differences in insulator processing conditions resolve the interface trap generation versus hole trapping controversy?" in Proc. IEEE IRPS, 2007, pp. 1-9.
34. D. S. Ang and S. Wang, "Recovery of the NBTI-stressed ultrathin gate p-MOSFET: The role of deep-level hole traps," IEEE Electron Device Lett., vol. 27, no. 11, pp. 914-916, Nov. 2006.
35. S. Zafar, A. Kumar, E. Gusev, and E. Cartier, "Threshold voltage instabilities in high-k gate dielectric stacks," IEEE Trans. Device Mater. Rel., vol. 5, no. 1, pp. 45-64, Mar. 2005.
36. 2 dynamics for negative bias temperature instability (NBTI) degradation," IEEE Trans. Electron Devices, vol. 54, no. 5, pp. 1101-1107, May 2007.
37. A. E. Islam, H. Kufluoglu, D. Varghese, and M. A. Alam, "Critical analysis of short-term negative bias temperature instability measurements: Explaining the effect of time-zero delay for on-the-fly measurements," Appl. Phys. Lett., vol. 90, no. 8, p. 083 505, Feb. 2007.
38. C. G. Van de Walle, "Theory of Hydrogen-related levels in semiconductors and oxides," in IEDM Tech. Dig., 2005, pp. 400-403.
39. S. Mahapatra, P. B. Kumar, and M. A. Alam, "A new observation of enhanced bias temperature instability in thin gate oxide p-MOSFET," in IEDM Tech. Dig., 2003, pp. 337-340.
40. N. Kimizuka, T. Yamamoto, T. Mogami, K. Yamaguchi, K. Imai, and T. Horiuchi, "The impact of bias temperature instability for direct-tunneling ultra-thin gate oxide on MOSFET scaling," in VLSI Symp. Tech. Dig., 1999, pp. 73-74.
41. H. Aono, E. Murakami, K. Okuyama, A. Nisluda, M. Minami, Y. Ooji, and K. Kubota, "Modeling of NBTI degradation and its impact on electric field dependence of the lifetime," in Proc. IEEE IRPS, 2004, pp. 23-27.
42. L. Tsetseris, X. J. Zhou, D. M. Fleetwood, R. D. Schrimpf, and S. T. Pantelides, "Physical mechanisms of negative-bias temperature instability," Appl. Phys. Lett., vol. 86, no. 14, p. 142 103, Apr. 2005.
43. J. W. McPherson and H. C. Mogul, "Underlying physics of the thermochemical E model in describing low-field time-dependent dielectric breakdown in SiO2 thin films," J. Appl. Phys., vol. 84, no. 3, pp. 1513-1523, Aug. 1998.
44. A. Ghetti, A. Hamad, P. J. Silverman, H. Vaidya, and N. Zhao, "Self-consistent simulation of quantization effects and tunneling current in ultra-thin gate oxide MOS devices," in Proc. SISPAD, 1999, pp. 239-242.
45. L. Pauling, The Nature of The Chemical Bond, 3rd ed. Ithaca, NY: Cornell Univ. Press, 1960, pp. 88-91.
46. 2 interface," J. Appl. Phys., vol. 63, no. 6, pp. 2000-2005, Mar. 1988.
47. C. Kittel, Introduction to Solid State Physics, 7th ed. Hoboken, NJ: Wiley, 1996, pp. 381-390.
48. D. A. Muller, T. Sorsch, S. Moccio, F. H. Baumann, K. Evans-Lutterodt, and G. Timp, "The electronic structure at the atomic scale of ultrathin gate oxides," Nature, vol. 399, no. 6738, pp. 758-761, Jun. 1999.
49. B. J. Fishbein, J. T. Watt, and J. D. Plummer, "Time resolved annealing of interface traps in polysilicon gate metal-oxide-silicon capacitors," J. Electrochem. Soc., vol. 134, no. 3, pp. 674-681, Mar. 1987.
50. B. Tuttle, "Energetics and diffusion of hydrogen in SiO2," Phys. Rev. B, Condens. Matter, vol. 61, no. 7, pp. 4417-4420, Feb. 2000.
51. L. Lundkvist, I. Lundstrom, and C. Svensson, "Discharge of MNOS structures," Solid State Electron., vol. 16, no. 7, pp. 811-818, 1973.
52. T. H. Ning, "Capture cross-section and trap concentration of holes in silicon dioxide," J. Appl. Phys., vol. 47, no. 3, pp. 1079-1081, Mar. 1976.
53. J. F. Zhang, C. Z. Zhao, A. H. Chen, G. D. Groeseneken, and R. Degraeve, "Hole traps in silicon dioxides - Part I: Properties," IEEE Trans. Electron Devices, vol. 51, no. 8, pp. 1267-1273, Aug. 2004.
54. S. Rauf, S. Lim, and P. L. G. Ventzek, "Model for nitridation of nanoscale SiO2 thin films in pulsed inductively coupled N-2 plasma," J. Appl. Phys., vol. 98, no. 2, p. 24 305, Jul. 2005.