Universal Recovery Behavior of Negative Bias Temperature Instability

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2003, Pages 341-344

  Rangan, Sanjay ^a   Mielke, Neal ^a   Yeh, Everett C C ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVATION ENERGY; DEGRADATION; DIFFUSION IN GASES; ELECTRIC CURRENTS; PARAMETER ESTIMATION; STRESSES; THERMAL EFFECTS; THRESHOLD VOLTAGE;

CHARGE PUMPING (CP); STRESS FIELDS;

MOSFET DEVICES;

EID: 0842309776     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

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2. P.Chaparala, J.Shibley, P.Lim, "Threshold voltage drifts in PMOSFETS due to NBTI and HCI," Intg. Rel. Workshop, pp.95-97, 2000.
3. V.Reddy et al., "Impact of NBTI on digital circuit reliability," IEEE Rel. Phys. Symp., pp.248-254, 2002.
4. K.O.Jeppson, C.M. Svensson, "Negative bias stress of MOS at high electric fields and degradation of MNOS devices," J. App. Phys., p.2004-2014, 1977.
5. S. Tsujikawa et al., "NBTI of pMOSFETs with ultra-thin SiON gate dielectrics" IRPS, p183-188, 2003.
6. W.Abadeer, W.Ellis, "Behavior of nbti under ac dynamic circuit conditions," IRPS, pp. 17-22, 2003.