Controlling Short-Channel Effects in Deep-Submicron SOI MOSFETs for Improved Reliability: A Review

IEEE Transactions on Device and Materials Reliability

Volumn 4, Issue 1, 2004, Pages 99-109

  Chaudhry, Anurag ^a   Kumar, M Jagadesh ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY DELHI   (India)

Author keywords

Modeling; MOSFETs; Short channel effects; Silicon on insulator (SOI); Simulation

Indexed keywords

COMPUTER SIMULATION; ELECTRIC CURRENTS; GATES (TRANSISTOR); HOT CARRIERS; MICROPROCESSOR CHIPS; MOSFET DEVICES; SILICON WAFERS; THIN FILM DEVICES; THRESHOLD VOLTAGE; ULSI CIRCUITS;

DRAIN INDUCED BARRIER LOWERING (DIBL); DRAIN JUNCTIONS; DUAL MATERIAL GATE (DMG); SHORT CHANNEL EFFECTS;

SILICON ON INSULATOR TECHNOLOGY;

EID: 2342583496     PISSN: 15304388     EISSN: None     Source Type: Journal    
DOI: 10.1109/TDMR.2004.824359     Document Type: Conference Paper

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