Influence of HALO implantation on analog performance and comparison between bulk, partially-depleted and fully-depleted MOSFETs

IEEE International SOI Conference

Volumn , Issue , 2002, Pages 161-162

  Vancaillie, L ^a   Kilchytska, V ^a   Levacq, D ^a   Adriaensen, S ^a   Van Meer, H ^b,c   De Meyer, K ^b,c   Torrese, G ^a   Raskin, J P ^a   Flandre, D ^a  

^a UNIVERSITÉ CATHOLIQUE DE LOUVAIN   (Belgium)

^b IMEC   (Belgium)

^c UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC DISTORTION; LEAKAGE CURRENTS; PARAMETER ESTIMATION; SILICON ON INSULATOR TECHNOLOGY; SILICON WAFERS; THICKNESS MEASUREMENT; THRESHOLD VOLTAGE;

KINK EFFECTS;

MOSFET DEVICES;

EID: 0036454484     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/soi.2002.1044459     Document Type: Conference Paper

References (6)

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4. H. van Meer et al., IEEE int SOI Conference Proceedings, pp.45-46, Oct.2001.
5. nd edition, 1997.
6. K.M. Cao et al., IEDM 99, pp.171-174, Dec. 1999.