25 nm CMOS design considerations

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 1998, Pages 789-792

  Taur, Yuan ^a   Wann, Clement H ^a   Frank, David J ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRON TUNNELING; FIELD EFFECT TRANSISTORS; INTEGRATED CIRCUIT LAYOUT; MONTE CARLO METHODS; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR DOPING;

SOURCE-DRAIN DOPING;

CMOS INTEGRATED CIRCUITS;

EID: 0032256253     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)