Analysis of floating body effects in thin film conventional and single pocket SOI MOSFETs using the GIDL current technique

IEEE Electron Device Letters

Volumn 23, Issue 4, 2002, Pages 209-211

  Najeeb Ud Din, ^b   Dunga, Mohan V ^b   Kumar, Aatish ^b   Vasi, J ^a,b   Rao, V Ramgopal ^a,b,d   Cheng, Baohong ^c,d   Woo, J C S ^a,d  

^a IEEE   (India)

^b INDIAN INSTITUTE OF TECHNOLOGY BOMBAY   (India)

^c Resonext Communications   (United States)

^d Engineering IV   (United States)

Author keywords

Gate induced drain leakage (GIDL); Silicon on insulator (SOI) technology; Single pocket; Thin film devices

Indexed keywords

FLOATING BODY EFFECTS; GATE INDUCED DRAIN LEAKAGE CURRENT;

BIPOLAR TRANSISTORS; COMPUTER SIMULATION; LEAKAGE CURRENTS; SILICON ON INSULATOR TECHNOLOGY; THIN FILM TRANSISTORS;

MOSFET DEVICES;

EID: 0036541362     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.992841     Document Type: Article

References (10)

1. Analysis and control of floating-body bipolar effects in fully depleted submicrometer SOI MOSFETs
2. Sub 0.18 μm SOI MOSFETs using lateral asymmetric channel profile and Ge pre-amorphization salicide technology
3. Channel engineering for high speed sub-1.0 V power supply deep sub-micron CMOS
4. Realization of sub 100 nm asymmetric channel MOSFETs with excellent short-channel performance and reliability
5. Graded-channel fully depleted silicon-on-insulator nMOSFET for reducing the parasitic bipolar effects
6. The impact of gate-induced-drain-leakage on MOSFET scaling
7. The enhancement of gate-induced-drain-leakage current in short-channel SOI MOSFET and its application in measuring lateral bipolar current gain β
8. Two-dimensional device simulation program
9. Characterization of the parasitic bipolar transistor in SOI technology: Comparison between direct and indirect triggering techniques