Compact noise models for MOSFETs

IEEE Transactions on Electron Devices

Volumn 53, Issue 9, 2006, Pages 2051-2061

  Jindal, Renuka P ^a,b  

^a IEEE   (United States)

^b University of Louisiana at Lafayette   (United States)

Author keywords

Channel thermal noise; CMOS noise; Compact MOSFET noise models; Excess channel noise; Gate current noise; Gate resistance noise; Hot carrier noise; Induced gate noise; Induced substrate noise; Substrate current supershot noise; Substrate resistance noise

Indexed keywords

CHANNEL THERMAL NOISE; COMPACT MOSFET NOISE MODELS; EXCESS CHANNEL NOISE; GATE CURRENT NOISE; GATE RESISTANCE NOISE; HOT CARRIER NOISE; INDUCED GATE NOISE; INDUCED SUBSTRATE NOISE; SUBSTRATE CURRENT SUPERSHOT NOISE; SUBSTRATE RESISTANCE NOISE;

CMOS INTEGRATED CIRCUITS; DRAIN CURRENT; ELECTRIC RESISTANCE; GATES (TRANSISTOR); THERMAL NOISE;

MOSFET DEVICES;

EID: 33947141396     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2006.880368     Document Type: Article

References (119)

1. J. E. Lilienfeld, "Method and apparatus for controlling electric currents," U.S. Patent 1,745,175, Jan. 28, 1930. Filed Oct. 8, 1926 (Oct. 22, 1925 in Canada).
2. _, "Amplifier for electric current," U.S. Patent 1,877,140, Sep. 13, 1932. filed Dec. 8, 1928.
3. _, "Device for controlling electric current," U.S. Patent 1,900,018, Mar. 7, 1933. filed Mar. 28, 1928.
4. O. Heil, "Improvements in, or relating to electrical amplifiers and other control arrangements and devices," British Patent 439,457, 1939.
5. R. M. Warner, "Microelectronics: Its unusual origin and personality," IEEE Trans. Electron Devices, vol. 48, no. 11, pp. 2457-2467, Nov. 2001.
6. D. Kahng and M. M. Atalla, "Silicon-silicon dioxide field induced surface devices," in Proc. IRE Solid-State Devices Res. Conf.. Pittsburgh, PA: Carnegie Inst. Technol., 1960.
7. A. van der Ziel, "Thermal noise in field effect transistors," in Proc. IRE, Aug. 1962, vol. 50, pp. 1808-1812.
8. _, "Gate noise in field effect transistors at moderately high frequencies," Proc. IEEE, vol. 51, no. 3, pp. 461-467, Mar. 1963.
9. D. L. Fraser, Jr., G. F. Williams, R. P. Jindal, R. A. Kushner, and B. Owen, "A single chip NMOS preamplifier for optical fiber receivers," in Proc. IEEE Int. Solid-State Circuits Conf., Feb. 1983, vol. XXVI, pp. 80-81.
10. H. C. Poon, "Detailed modeling of nonlinear distortion in bipolar transistors," in IEDM Tech. Dig., 1970, pp. 22-24.
11. C. McAndrew, Freescale Semiconductor, private communication.
12. H. Nyquist, "Thermal agitation of electric charge in conductors," Phys. Rev., vol. 32, no. 1, pp. 110-113, Jul. 1928.
13. C. T. Sah, "Theory and experiments on the 1/f surface noise of MOS insulated-gate field-effect transistors," IEEE Trans. Electron Devices, vol. 11, no. 11, p. 534, Nov. 1964.
14. A. G. Jordan and N. A. Jordan, "Theory of noise in metal oxide semiconductor devices," IEEE Trans. Electron Devices, vol. ED-12, no. 3, pp. 148-156, Mar. 1965.
15. C. T. Sah, S. Y. Wu, and F. H. Hielschler, "The effects of fixed bulk charge on the thermal noise in metal-oxide-semiconductor transistors," IEEE Trans. Electron Devices, vol. ED-13, no. 4, pp. 410-414, Apr. 1966.
16. F. M. Klaassen and J. Prins, "Thermal noise in MOS transistors," Philips Res. Rep., vol. 22, pp. 504-514, 1967.
17. M. Shoji, "Analysis of high frequency thermal noise of enhancement mode MOS field-effect transistors," IEEE Trans. Electron Devices, vol. 13, no. 6, pp. 520-524, Jun. 1966.
18. L.-J. Pu and Y. Tsividis, "Small-signal parameters and thermal noise of the four-terminal MOSFET in non-quasistatic operation," Solid State Electron., vol. 33, no. 5, pp. 513-521, May 1990.
19. R. van Langevelde, J. C. J. Paasschens, A. J. Scholten, R. J. Havens, L. F. Tiemeijer, and D. B. M. Klaassen, "New compact model for induced gate current noise," in IEDM Tech. Dig., 2003, pp. 36.2.1-36.2.4.
20. R. P. Jindal, "Effect of induced gate noise at zero drain bias in field-effect transistors," IEEE Trans. Electron Devices, vol. 52, no. 3, pp. 432-434, Mar. 2005.
21. _, "Gigahertz-band high gain low noise AGC amplifiers in fine line NMOS," IEEE J. Solid-State Circuits, vol. 22, no. 4, pp. 512-521, Aug. 1987.
22. K. Takagi and A. van der Ziel, "Drain noise in MOSFETs at zero drain bias as a function of temperature," Solid State Electron., vol. 22, no. 1, pp. 87-88, Jan. 1979.
23. K. K. Thornber, "Resistive-gate-induced thermal noise in IGFET's," IEEE J. Solid-State Circuits, vol. 16, no. 4, pp. 414-415, Aug. 1981.
24. R. P. Jindal, "Noise associated with distributed resistance of MOSFET gate structures in integrated circuits," IEEE Trans. Electron Devices, vol. 31, no. 10, pp. 1505-1509, Oct. 1984.
25. S. Xie and D. R. Conn, "A low-noise gate structure for DMOS monolithic devices," IEEE Trans. Electron Devices, vol. 36, no. 7, pp. 1393-1396, Jul. 1989.
26. T. Manku, "Microwave CMOS-Device physics and design," IEEE J. Solid-State Circuits, vol. 34, no. 3, pp. 277-285, Mar. 1999.
27. S. Tedja, H. H. Williams, J. Van der Spiegel, F. M. Newcomer, and G. R. Vanberg, "Noise spectral-density measurements of a radiation hardened CMOS process in the weak and moderate inversion," IEEE Trans. Nucl. Sci., vol. 39, no. 4, pp. 804-808, Aug. 1992.
28. S. Tedja, J. Van der Speigel, and H. H. Williams, "Analytical and experimental studies of thermal noise in MOSFETs," IEEE Trans. Electron Devices, vol. 41, no. 11, pp. 2069-2075, Nov. 1994.
29. G. Anelli, F. Faccio, S. Florian, and P. Jarron, "Noise characterization of a 0.25 mu m CMOS technology for the LHC experiments," Nucl. Instrum. Methods Phys. Res., Sect. A, Accel. Spectrom. Detect. Assoc. Equip., vol. 457, no. 1, pp. 361-368, Jan. 2001.
30. V. Re, I. Bietti, R. Castello, M. Manghisoni, V. Speziali, and F. Svelto, "Experimental study and modeling of the white noise sources in submicron p- and n-MOSFETs," IEEE Trans. Nucl. Sci., vol. 48, no. 4, pp. 1577-1586, Aug. 2001.
31. E. Abou-Allam and T. Manku, "A small-signal MOSFET model for radio frequency IC applications," IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 16, no. 5, pp. 437-447, May 1997.
32. _, "An improved transmission-line model for MOS transistors," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 46, no. 11, pp. 1380-1387, Nov. 1999.
33. S. F. Tin, A. A. Osman, K. Mayaram, and C. Hu, "A simple subcircuit extension of the BSIM3v3 model for CMOS RF design," IEEE J. Solid-State Circuits, vol. 35, no. 4, pp. 612-624, Apr. 2000.
34. E. F. Tsakas and A. N. Birbas, "Noise associated with interdigitated gate structures in RF submicron MOSFETs," IEEE Trans. Electron Devices, vol. 47, no. 9, pp. 1745-1750, Sep. 2000.
35. J.-S. Goo et al., "An accurate and efficient high frequency noise simulation technique for deep submicron MOSFETs," IEEE Trans. Electron Devices, vol. 47, no. 12, pp. 2410-2419, Dec. 2000.
36. A. J. Scholten, L. F. Tiemeijer, R. van Langevelde, R. J. Havens, A. T. A. Zegers-van Duijnhoven, and V. C. Venezia, "Noise modelling for RF CMOS circuit simulation," IEEE Trans. Electron Devices, vol. 50, no. 3, pp. 618-632, Mar. 2003.
37. M. Steyaert and Z. Chang, "Low voltage BIMOS AM front-end amplifier," Proc. Inst. Electr. Eng. - G Circuits Devices and Systems, vol. 137, no. 1, pp. 57-60, Feb. 1990.
38. Z. Chang and W. M. C. Sansen, "Low-noise, low-distortion CMOS AM wide-band amplifiers matching a capacitive source," IEEE J. Solid-State Circuits, vol. 25, no. 3, pp. 833-840, Jun. 1990.
39. D. K. Shaeffer and T. H. Lee, "A 1.5-V, 1.5-GHz CMOS low noise amplifier," IEEE J. Solid-State Circuits, vol. 32, no. 5, pp. 745-759, May 1997.
40. J. J. Zhou and D. J. Allstot, "Addition to 'Monolithic transformers and their application in a differential CMOS RF low-noise amplifier'," IEEE J. Solid-State Circuits, vol. 34, no. 8, p. 1176, Aug. 1999.
41. Y. Christoforou and O. Rossetto, "GaAs preamplifier and LED driver for use in cryogenic and highly irradiated environments," Nucl. Instrum. Methods Phys. Res., Sect. A, Accel. Spectrom. Detect. Assoc. Equip., vol. 425, no. 1, pp. 347-356, Apr. 1999.
42. M. T. Terrovitis and R. G. Meyer, "Noise in current-commutating CMOS mixers," IEEE J. Solid-State Circuits, vol. 34, no. 6, pp. 772-783, Jun. 1999.
43. E. F. Tsakas and A. Birbas, "Noise optimization for the design of a reliable high speed X-ray readout integrated circuit," Microelectron. Reliab., vol. 40, no. 11, pp. 1937-1942, Nov. 2000.
44. E. F. Tsakas, A. N. Birbas, N. Manthos, K. Kloukinas, I. Evangelou, F. A. Triantis, P. F. Van der Stelt, and R. D. Speller, "Low noise high-speed X-ray readout IC for imaging applications," Nucl. Instrum. Methods Phys. Res., Sect. A, Accel. Spectrom. Detect. Assoc. Equip., vol. 469, no. 1, pp. 106-115, Aug. 2001.
45. D. Maschera, A. Simoni, M. Gottardi, L. Gonzo, S. Gregori, V. Liberali, and G. Torelli, "An automatically compensated readout channel for rotary encoder system," IEEE Trans. Instrum. Meas. vol. 50, no. 6, pp. 1801-1807, Dec. 2001.
46. J.-S. Goo, H.-T. Ahn, D. J. Ladwig, Z. Yu, T. H. Lee, and R. W. Dutton, "A noise optimization technique for integrated low-noise amplifiers," IEEE J. Solid-State Circuits, vol. 37, no. 8, pp. 994-1002, Aug. 2002.
47. A. J. Scholten, L. F. Tiemeijer, R. van Langevelde, R. J. Havens, A. T. A. Zegers-van Duijnhoven, R. de Kort, and D. B. M. Klaassen, "Compact modelling of noise for RF CMOS circuit design," in Proc. Inst. Electr. Eng. - Circuits Devices Syst., 2004, vol. 151, no. 2, pp. 167-174.
48. H. J. Boll, Bell Laboratories, private communication.
49. R. P. Jindal, "Distributed substrate resistance noise in fine line NMOS field effect transistors," IEEE Trans. Electron Devices, vol. 32, no. 11, pp. 2450-2453, Nov. 1985.
50. C. Y. Chang, J. G. Su, S. C. Wong, T. Y. Huang, and Y. C. Sun, "RF CMOS technology for MMIC," Microelectron. Reliab., vol. 42, no. 4/5, pp. 721-733, Apr/May 2002.
51. V. Re and F. Svelto, "High accuracy measurement of low-frequency noise in front-end p-channel FETs," Nucl. Phys. B, vol. 44, no. 1, pp. 607-612, Nov. 1995.
52. C. S. Kim, J.-W. Park, H. K. Yu, and H. Cho, "Gate layout and bonding pad structure of a RF n-MOSFET for low noise performance," IEEE Electron Device Lett., vol. 21, no. 12, pp. 607-609, Dec. 2000.
53. D. M. Binkley, J. M. Rochelle, M. J. Paulus, and M. E. Casey, "A low-noise, wide-band, integrated CMOS transimpedance preamplifier for photodiode applications," IEEE Trans. Nucl. Sci., vol. 39, no. 4, pp. 747-752, Aug. 1992.
54. D. K. Shaeffer, A. R. Shahani, S. S. Mohan, H. Samavati, H. R. Rategh, M. del Mar Hershenson, M. Xu, C. P. Yue, D. J. Eddleman, and T. H. Lee, "A 115-mW, 0.5-μm CMOS GPS receiver with wide dynamic-range active filters," IEEE J. Solid-State Circuits, vol. 33, no. 12, pp. 2219-2231, Dec. 1998.
55. E. Beuville, K. Borer, E. Chesi, and E. H. M. Heijne, "Amplex, a low-noise, low-power analog CMOS signal processor for multi-element silicon particle detectors," Nucl. Instrum. Methods Phys. Res., Sect. A, Accel. Spectrom. Detect. Assoc. Equip., vol. 288, no. 1, pp. 157-167, Mar. 1990.
56. M. Gottardi, L. Gonzo, S. Gregori, V. Liberali, A. Simony, and G. Torelli, "An integrated CMOS front-end for optical absolute rotary encoders," Analog Integr. Circuits Signal Process., vol. 34, no. 2, pp. 143-154, Feb. 2003.
57. T. Lee, The Design of CMOS Radio-Frequency Integrated Circuits. Cambridge, U.K.: Cambridge Univ. Press, 1998, ch. 10.
58. R. P. Jindal, "High frequency noise in fine line NMOS field effect transistors," in IEDM Tech. Dig., Washington, DC, 1985, pp. 68-71.
59. Y. Tsividis, Operation and Modeling of the MOS Transistor, 2nd ed. New York: McGraw-Hill, 1999.
60. C. S. Kim, "Avalanche multiplication and related noise in silicon MOSFET's," Ph.D. dissertation, Univ. Florida, Gainesville, 1971.
61. L. M. Rucker and A. van der Ziel, "Noise associated with JFET gate current resulting from avalanching in the channel," Solid State Electron., vol. 21, no. 5, pp. 798-799, May 1978.
62. R. P. Jindal, "Noise associated with substrate current in fine line NMOS field effect transistors," in Proc. 42nd Device Res. Conf., 1984, pp. 18-20, see IEEE Trans. Electron Devices, vol. 31, p. 1971, Dec. 1984.
63. _, "Noise associated with substrate current in fine line NMOS field effect transistors," IEEE Trans. Electron Devices, vol. 32, no. 6, pp. 1047-1052, Jun. 1985.
64. W. Jin, P. C. H. Chan, S. K. H. Fung, and P. K. Ko, "Shot-noise- induced excess low-frequency noise in floating-body partially depleted SOI MOSFET's," IEEE Trans. Electron Devices, vol. 46, no. 6, pp. 1180-1185, Jun. 1999.
65. G. O. Workman and J. G. Fossum, "Physical noise modeling of SOI MOSFET's with analysis of the Lorentzian component in the low-frequency noise spectrum," IEEE Trans. Electron Devices, vol. 47, no. 6, pp. 1192-1201, Jun. 2000.
66. R. P. Jindal, "A scheme for ultra-low noise avalanche multiplication of fiber optics signal," IEEE-Trans. Electron Devices, vol. 34, no. 2, pp. 301-304, Feb. 1987.
67. J. N. Hollenhorst, "Ballistic avalanche photodiode: Ultra-low noise avalanche diode with nearly equal ionization probabilities," Appl. Phys. Lett., vol. 49, no. 9, p. 516, Sep. 1986.
68. R. P. Jindal, "Approaching fundamental limits on optical signal detection," Invited paper published in special issue on fluctuation phenomena in electronic and photonic devices, IEEE Trans. Electron Devices, vol. 41, no. 11, pp. 2133-2138, Nov. 1994.
69. F. M. Klassen, "On the influence of hot carrier effects on the thermal noise of field-effect transistors," IEEE Trans. Electron Devices, vol. 17, no. 10, pp. 858-862, Oct. 1970.
70. W. Baechtold, "Noise temperature in silicon in the hot electron region," IEEE Trans. Electron Devices, vol. 18, no. 12, pp. 1186-1187, Dec. 1971.
71. K. Takagi and K. Matsumoto, "Noise in silicon and FET's at high electric fields," Solid State Electron., vol. 20, no. 1, pp. 1-3, Jan. 1977.
72. K. Ogawa, Internal Memorandum, 1980, Bell Laboratories.
73. R. P. Jindal, Internal Memorandum, 1984, AT&T Bell Laboratories.
74. _, "Noise phenomena in submicron channel length silicon NMOS transistors," in Proc. 8th Int. Conf. Noise Phys. Syst., 4th Int. Conf. 1/f Noise Conf., Rome, Italy, 1985, pp. 199-202.
75. _, "Hot electron effects on channel thermal noise in fine line NMOS field effect transistors," IEEE Trans. Electron Devices, vol. 33, no. 9, pp. 1395-1397, Sep. 1986.
76. A. A. Abidi, "High-frequency noise measurements on FET's with small dimensions," IEEE Trans. Electron Devices, vol. ED-33, no. 11, pp. 1801-1805, Nov. 1986.
77. B. J. Sheu, D. L. Scharfetter, P.-K. Ko, and M.-C. Jeng, "BSIM: Berkeley short-channel IGFET model for MOS transistors," IEEE J. Solid-State Circuits, vol. SSC-22, no. 4, pp. 558-566, Aug. 1987.
78. A. Cappy and W. Heinrich, "High-frequency FET noise performance: A new approach," IEEE Trans. Electron Devices, vol. 36, no. 2, pp. 403-109, Feb. 1989.
79. F. Danneville, "Microscopic noise modeling and macroscopic noise models: How good a connection?," IEEE Trans. Electron Devices, vol. 41, no. 5, pp. 779-786, May 1994.
80. B. Wang, J. R. Hellums, and C. D. Sodini, "MOSFET thermal noise modeling for analog integrated circuits," IEEE J. Solid-State Circuits, vol. 29, no. 7, pp. 833-835, Jul. 1994.
81. Y. Omura, "An improved analytical solution of energy balance equation for short-channel SOI MOSFETs and transverse-field-induced carrier heating," IEEE Trans. Electron Devices, vol. 42, no. 2, pp. 301-306, Feb. 1995.
82. D. P. Triantis, A. N. Birbas, and D. Kondis, "Thermal noise modeling for short-channel MOSFET's," IEEE Trans. Electron Devices, vol. 43, no. 11, pp. 1950-1955, Nov. 1996.
83. D. P. Triantis and A. N. Birbas, "Optimal current for minimum thermal noise operation of submicrometer MOS transistors," IEEE Trans. Electron Devices, vol. 44, no. 11, pp. 1990-1995, Nov. 1997.
84. F. Bonani, G. Ghione, M. R. Pinto, and R. K. Smith, "An efficient approach to noise analysis through multidimensional physics-based models," IEEE Trans. Electron Devices, vol. 45, no. 1, pp. 261-269, Jan. 1998.
85. F. Svelto, "Noise analysis of submicron PMOS in NWELL," Nucl. Phys. B, vol. 61, no. 3, pp. 539-544, Feb. 1998.
86. P. Klien, "An analytical thermal noise model of deep submicron MOSFET's," IEEE Electron Device Lett., vol. 20, no. 8, pp. 399-401, Aug. 1999.
87. A. J. Scholten, "Accurate thermal noise model for deep-submicron CMOS," in IEDM Tech. Dig., 1999, pp. 155-158.
88. J. J. Ou, X. Jin, C. Hu, and P. R. Gray, "Submicron CMOS thermal noise modeling from an RF perspective," in VLSI Symp. Tech. Dig., 1999, pp. 151-152.
89. M. S. Obrecht, T. Manku, and M. I. Elmasry, "Simulation of temperature dependence of microwave noise in metal-oxide-semiconductor-field- effect transistors," Jpn. J. Appl. Phys., vol. 39, no. 4A, pp. 1690-1693, Apr. 2000.
90. W. Jin, P. C. H. Chan, and J. Lau, "A physical thermal noise model for SOI MOSFET," IEEE Trans. Electron Devices, vol. 47, no. 4, pp. 768-773, Apr. 2000.
91. J.-S. Goo et al., "Physical origin of the excess thermal noise in short channel MOSFETs," IEEE Electron Device Lett., vol. 22, no. 2, pp. 101-103, Feb. 2001.
92. G. Knoblinger, P. Klein, and M. Tiebout, "A new model for thermal channel noise of deep-submicron MOSFETS and its application in RF-CMOS design," IEEE J. Solid-State Circuits, vol. 36, no. 5, pp. 831-837, May 2001.
93. P. Klein, "An analytical thermal noise model of deep submicron MOSFETs," IEEE Electron Device Lett., vol. 20, no. 8, pp. 399-401, Aug. 1999.
94. R. Rengel, J. Mateos, D. Pardo, T. Gonzalez, and M. J. Martin, "Monte Carlo analysis of dynamic and noise performance of submicron MOSFETs at RF and microwave frequencies," Semicond. Sci. Technol., vol. 16, no. 11, pp. 939-946, Nov. 2001.
95. C.-H. Chen and M. J. Deen, "Channel noise modeling of deep submicron MOSFETs," IEEE Trans. Electron Devices, vol. 49, no. 8, pp. 1484-1487, Aug. 2002.
96. M- S. Obrecht, E. Abou-Allam, and T. Manku, "Diffusion current and its effect on noise in submicron MOSFETs," IEEE Trans. Electron Devices, vol. 49, no. 3, pp. 524-526, Mar. 2002.
97. S. Andersson and C. Svensson, "Direct experimental verification of shot noise in short channel MOS transistors," Electron. lett., vol. 41, no. 15, pp. 869-871, Jul. 2005.
98. R. Navid and W. Dutton, "The physical phenomena responsiblé for excess noise in short-channel MOS devices," in Proc. Int. Conf. Simul. Semicond. Processes and Devices, Tech. Dig., Kobe, Japan, Sep. 2002, pp. 75-78.
99. C. Jungemann, "Hydrodynamic modeling of RF noise in CMOS devices," in IEDM Tech. Dig., 2003, pp. 871-874.
100. H. F. Teng and S. L. Jang, "A nonlocal channel thermal noise model for nMOSFETs," Solid State Electron., vol. 47, no. 5, pp. 815-819, May 2003.
101. K. Han, H. Shin, and K. Lee, "Analytical drain thermal noise current model valid for deep submicron MOSFETs," IEEE Trans. Electron Devices, vol. 51, no. 2, pp. 261-269, Feb. 2004.
102. K. Han, K. Lee, and H. Shin, "Thermal noise modeling for short-channel MOSFET's," in Proc. Int. Conf. SISPAD, Sep. 2003, pp. 79-82.
103. S. Asgaran, M. J. Deen, and C.-H. Chen, "Analytical modeling of MOSFETs channel noise and noise parameters," IEEE Trans. Electron Devices, vol. 51, no. 12, pp. 2109-2114, Dec. 2004.
104. R. P. Jindal, "A physical understanding of the noise performance of MOS transistors for wireless and lightwave applications in the giga-bit regime," in Proc. 3rd SPIE Int. Symp. Fluctuation and Noise, Austin, TX, May 2005, pp. 10-22.
105. A.-S. Porret and C. C. Enz, "Non-quasi-static (NQS) thermal noise modelling of the MOS transistor," Proc. Inst. Electr. Eng. - Circuits Devices Syst., vol. 151, no. 2, pp. 155-166, Apr. 2004.
106. S. Sirohi and R. P. Jindal, "Evidence of shot noise generation in MOSFET channels," IEEE Trans. Electron Devices, to be submitted for publication.
107. A. van der Ziel, "On the noise spectra of semiconductor noise and of flicker effect," Physics, vol. 16, no. 4, pp. 359-372, 1950.
108. F. K. Du Pre, "A suggestion regarding the spectral density of flicker noise," Phys. Rev., vol. 78, no. 5, p. 615, Jun. 1950.
109. A. L. McWhorter, "1/f Noise and germanium surface properties," in Semiconductor Surface Physics. Philadelphia, PA: Univ. of Pennsylvania Press, 1957.
110. F. N. Hooge, "1/f Noise is no surface effect," Phys. Lett., vol. 29A, no. 3, pp. 139-140, Apr. 1969.
111. K. S. Ralls, W. J. Skocpol, L. D. Jackel, R. E. Howard, L. A. Fetter, R. W. Epworth, and D. M. Tennant, "Discrete resistance switching in submicrometer silicon inversion layers: Individual interface traps and low-frequency (1/f?) noise," Phys. Rev. Lett., vol. 52, no. 3, pp. 228-231, Jan. 1984.
112. J. C. J. Paasschens, A. J. Scholten, and R. van Langevelde, "Generalizations of the Klaassen-Prins equation for calculating the noise of semiconductor devices," IEEE Trans. Electron Devices, vol. 52, no. 11, pp. 2463-2472, Nov. 2005.
113. S. Dronavalli and R. P. Jindal, "CMOS device noise considerations for tera-bit lightwave systems," IEEE Trans. Electron Devices, vol. 53, no. 4, pp. 623-630, Apr. 2006.
114. R. Jayaraman and C. G. Sodini, "A 1/f noise technique to extract the oxide trap density near the conduction band edge of silicon," IEEE Trans. Electron Devices, vol. 36, no. 9, pp. 1773-1782, Sep. 1989.
115. E. P. Vandamme and L. K. J. Vandamme, "Critical discussion on unified 1/f noise models for MOSFETs," IEEE Trans. Electron Devices, vol. 47, no. 11, pp. 2146-2152, Nov. 2000.
116. A. S. Roy and C. C. Enz, "Compact modeling of thermal noise in the MOS transistor," IEEE Trans. Electron Devices, vol. 52, no. 4, pp. 611-614, Apr. 2005.
117. D. M. Fleetwood, H. D. Xiong, Z.-Y. Lu, C. J. Nicklaw, J. A. Felix, R. D. Schrimpf, and S. T. Pantelides, "Unified model of hole trapping, 1/f noise, and thermally stimulated current in MOS devices," IEEE Trans. Nucl. Sci., vol. 49, no. 6, pp. 2674-2683, Dec. 2002.
118. A. S. Roy and C. C. Enz, "Noise modeling methodologies in the presence of mobility degradation and their equivalence," IEEE Trans. Electron Devices, vol. 53, no. 2, pp. 348-355, Feb. 2006.
119. R. Sitte, S. Dimitrijev, and H. B. Harrison, "Device parameter changes caused by manufacturing fluctuations of deep submicron MOSFET's," IEEE Trans. Electron Devices, vol. 41, no. 11, pp. 2210-2215, Nov. 1994.