An improved transmission-line model for MOS transistors

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 46, Issue 11, 1999, Pages 1380-1387

  Abou Allam, Eyad ^a   Manku, Tajinder ^a  

^a UNIVERSITY OF WATERLOO   (Canada)

Author keywords

Gate resistance; High frequency modeling; Induced gate noise; MOSFET model; Radio frequency models; Transmission line model

Indexed keywords

CAPACITANCE; ELECTRIC LINES; ELECTRIC RESISTANCE; GATES (TRANSISTOR); SEMICONDUCTOR DEVICE MODELS; SPURIOUS SIGNAL NOISE;

DISTRIBUTED RESISTANCE-CAPACITANCE EFFECTS; HIGH-FREQUENCY SMALL-SIGNAL MODELS;

MOSFET DEVICES;

EID: 0033335638     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.803477     Document Type: Article

References (6)

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2. B. Razavi R.-H. Yan and K. F. Lee Impact of distributed date resistance on the performance of MOS devices IEEE Trans. Circuits Systems I vol. 41 pp. 750-754 Nov. 1994.
3. E. Abou-Allam and T. Manku A small signal MOSFET model for radio frequency 1C applications IEEE Trans. Computer-Aided Design vol. 16 pp. 437-447 May 1997.
4. A. Van der Ziel Noise in Solid State Devices and Circuits. New York: Wiley 1986.
5. Y. P. Tsividis Operation and Modeling of the MOS Transistor. New York: McGraw-Hill 1987.
6. G. D. Vendelin A. M. Pavio and U. L. Rohde Microwave Circuit Design Using Linear and Nonlinear Techniques. New York: Wiley 1990.