Spike-based synaptic plasticity in silicon: Design, implementation, application, and challenges

Proceedings of the IEEE

Volumn 102, Issue 5, 2014, Pages 717-737

  Azghadi, Mostafa Rahimi ^a,b   Iannella, Nicolangelo ^a   Al Sarawi, Said F ^a   Indiveri, Giacomo ^b   Abbott, Derek ^a  

^a UNIVERSITY OF ADELAIDE   (Australia)

^b UNIVERSITY OF ZURICH   (Switzerland)

Author keywords

Analog digital synapse; Bienenstock Cooper Munro (BCM); calcium based plasticity; learning; local correlation plasticity (LCP); neuromorphic engineering; rate based plasticity; spike based plasticity; spike timing dependent plasticity (STDP); spiking neural networks; synaptic plasticity; triplet STDP; very large scale integration (VLSI); Voltage based STDP

Indexed keywords

NEURAL NETWORKS; NEURONS; SIGNAL PROCESSING; SILICON; VLSI CIRCUITS;

ANALOG/DIGITAL SYNAPSE; BIENENSTOCK-COOPER-MUNRO (BCM); LEARNING; LOCAL CORRELATIONS; NEUROMORPHIC ENGINEERING; SPIKE TIMING DEPENDENT PLASTICITIES; SPIKE-BASED PLASTICITY; SPIKING NEURAL NETWORKS; SYNAPTIC PLASTICITY; TRIPLET STDP;

INTEGRATED CIRCUIT DESIGN;

EID: 84900482869     PISSN: 00189219     EISSN: None     Source Type: Journal    
DOI: 10.1109/JPROC.2014.2314454     Document Type: Article

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