Memristive device fundamentals and modeling: Applications to circuits and systems simulation

Proceedings of the IEEE

Volumn 100, Issue 6, 2012, Pages 1991-2007

  Eshraghian, Kamran ^a   Kavehei, Omid ^a,b   Cho, Kyoung Rok ^a   Chappell, James M ^a   Iqbal, Azhar ^b   Al Sarawi, Said F ^b   Abbott, Derek ^b  

^a Chungbuk National University   (South Korea)

^b UNIVERSITY OF ADELAIDE   (Australia)

Author keywords

Conductance modulation index; content addressable memory (CAM); memory; memristor; memristor based content addressable memory (MCAM); SPICE modeling

Indexed keywords

ASSOCIATIVE STORAGE; COMPUTER AIDED DESIGN; DATA STORAGE EQUIPMENT; MEMORY ARCHITECTURE; SPICE; TIMING CIRCUITS;

CIRCUITS AND SYSTEMS; COMPUTER AIDED DESIGN TOOLS; CONDUCTANCE MODULATIONS; MEMORY APPLICATIONS; MEMRISTOR; NON-VOLATILE MEMORY; SPICE MODELING; TUNNELING MECHANISM;

MEMRISTORS;

EID: 84861198528     PISSN: 00189219     EISSN: None     Source Type: Journal    
DOI: 10.1109/JPROC.2012.2188770     Document Type: Conference Paper

References (45)

1. L. Chua, "MemristorVThe missing circuit element, "IEEE Trans. Circuit Theory, vol. CT-18, no. 5, pp. 507-519, Sep. 1971.
2. D. B. Strukov, G. S. Snider, D. R. Stewart, and R. S. Williams, "The missing memristor found, "Nature, vol. 453, no. 7191, pp. 80-83, 2008. (Pubitemid 351630336)
3. International Technology Roadmap for Semiconductors, Emerging Research Devices (ERD), 2009. [Online]. Available: http://www.itrs.net/.
4. B. J. Choi, D. S. Jeong, S. K. Kim, C. Rohde, S. Choi, J. H. Oh, H. J. Kim, C. S. Hwang, K. Szot, R. Waser, B. Reichenberg, and S. Tiedke, "Resistive switching mechanism of TiO2 thin films grown by atomic-layer deposition, "J. Appl. Phys., vol. 98, no. 3, 2005, article 033715.
5. B. Widrow, "Adaptive FADALINE-neuron using chemical Fmemistors-, "Stanford Electron. Lab., Stanford, CA, Tech. Rep. 1553-2, 1960.
6. J. G. Simmons, "Generalized formula for the electric tunnel effect between similar electrodes separated by a thin insulating film, "J. Appl. Phys., vol. 34, no. 6, pp. 1793-1803, 1963.
7. L. Chua, "Nonlinear circuit foundations for nanodevicesVPart I: The four-element torus, "Proc. IEEE, vol. 91, no. 11, pp. 1830-1859, Nov. 2003. (Pubitemid 40890789)
8. M. D. Ventra, Y. Pershin, and L. Chua, "Circuit elements with memory: Memristors, memcapacitors, and meminductors, "Proc. IEEE, vol. 97, no. 10, pp. 1717-1724, Oct. 2009.
9. L. O. Chua and S. M. Kang, "Memristive devices and systems, "Proc. IEEE, vol. 64, no. 2, pp. 209-223, Feb. 1976.
10. M. D. Pickett, D. B. Strukov, J. L. Borghetti, J. J. Yang, G. S. Snider, D. R. Stewart, and R. S. Williams, "Switching dynamics in titanium dioxide memristive devices, "J. Appl. Phys., vol. 106, no. 7, 2009, article 074508.
11. R. Waser and M. Aono, "Nanoionics-based resistive switching memories, "Nature Mater., vol. 6, no. 11, pp. 833-840, 2007. (Pubitemid 350064191)
12. K. Szot, W. Speier, G. Bihlmayer, and R. Waser, "Switching the electrical resistance of individual dislocations in single-crystalline SrTiO3, "Nature Mater., vol. 5, no. 4, pp. 312-320, 2006.
13. O. Kavehei, A. Iqbal, Y. S. Kim, K. Eshraghian, S. F. Al-Sarawi, and D. Abbott, "The fourth element: Characteristics, modelling and electromagnetic theory of the memristor, "Proc. Roy. Soc. A, Math. Phys. Eng. Sci., vol. 466, no. 2120, pp. 2175-2202, 2010.
14. Y. N. Joglekar and S. J. Wolf, "The elusive memristor: Properties of basic electrical circuits, "Eur. J. Phys., vol. 30, no. 4, 2009, DOI: 10.1088/0143-0807/30/4/001.
15. D. Biolek, Z. Biolek, and V. Biolkova, "SPICE modeling of memristive, memcapacitative and meminductive systems, "in Proc. Eur. Conf. Circuit Theory Design, 2009, pp. 249-252.
16. P. O. Vontobel, W. Robinett, P. J. Kuekes, D. R. Stewart, J. Straznicky, and R. S. Williams, "Writing to and reading from a nano-scale crossbar memory based on memristors, "Nanotechnology, vol. 20, no. 42, 2009, article 425204.
17. E. Lehtonen and M. Laiho, "CNN using memristors for neighborhood connections, "in Proc. 12th Int. Workshop Cellular Nanoscale Netw. Appl., 2010, DOI: 10.1109/CNNA.2010. 5430304.
18. S. Shin, K. Kim, and S. Kang, "Compact models for memristors based on charge-flux constitutive relationships, "IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 29, no. 4, pp. 590-598, Apr. 2010.
19. K. Eshraghian, K. Cho, O. Kavehei, S. Kang, D. Abbott, and S. M. Kang, "Memristor MOS content addressable memory (MCAM): Hybrid architecture for future high performance search engines, "IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 19, no. 8, pp. 1407-1417, Aug. 2011.
20. D. Strukov and R. Williams, "Exponential ionic drift: Fast switching and low volatility of thin-film memristors, "Appl. Phys. A, Mater. Sci. Process., vol. 94, no. 3, pp. 515-519, 2009.
21. O. Kavehei, K. R. Cho, S. J. Lee, S. J. Kim, S. Al-Sarawi, D. Abbott, and K. Eshraghian, "Fabrication and modeling of Ag/TiO2/ITO memristor, "in Proc. 54th IEEE Int. Midwest Symp. Circuits Syst., 2011, DOI: 10.1109/MWSCAS.2011.6026575.
22. J. J. Yang, M. D. Pickett, X. Li, D. A. A. Ohlberg, D. R. Stewart, and R. S. Williams, "Memristive switching mechanism for metal/oxide/metal nanodevices, "Nature Nanotechnol., vol. 3, pp. 429-433, 2008.
23. Y. V. Pershin, S. L. Fontaine, and M. D. Ventra, "Memristive model of amoeba learning, "Phys. Rev. E, vol. 80, no. 2, 2009, article 021926.
24. B. Linares-Barranco and T. Serrano-Gotarredona, "Memristance can explain spike-time-dependent-plasticity in neural synapses, "Nature Precedings, 2009, DOI: npre.2009.3010.1.
25. F. Miao, J. J. Yang, J. P. Strachan, D. Stewart, R. S. Williams, and C. N. Lau, "Force modulation of tunnel gaps in metal oxide memristive nanoswitches, "Appl. Phys. Lett., vol. 95, no. 11, 2009, article 113503.
26. D. R. Stewart, D. A. A. Ohlberg, P. A. Beck, Y. Chen, R. S. Williams, J. O. Jeppesen, K. A. Nielsen, and J. F. Stoddart, "Molecule-independent electrical switching in Pt/organic monolayer/Ti devices, "Nano Lett., vol. 4, no. 1, pp. 133-136, 2004. (Pubitemid 38167878)
27. A. Shkabko, M. H. Aguirre, P. Hug, A. Weidenkaff, I. Marozau, and T. Lippert, "The effects of switching time and SrTiO3-xNy nanostructures on the operation of Al/SrTiO3-xNy/Al memristors, "IOP Conf. Ser., Mater. Sci. Eng., vol. 8, no. 1, article 074508, 2010.
28. A. Vilan, "Analyzing molecular current-voltage characteristics with the Simmons tunneling model: Scaling and linearization, "J. Phys. Chem. C, vol. 111, no. 11, pp. 4431-4444, 2007. (Pubitemid 46548856)
29. T. Hasegawa, T. Ohno, K. Terabe, T. Tsuruoka, T. Nakayama, J. K. Gimzewski, and M. Aono, "Learning abilities achieved by a single solid-state atomic switch, "Adv. Mater., vol. 22, no. 16, pp. 1831-1834, 2010.
30. H. Choi, H. Jung, J. Lee, J. Yoon, J. Park, D.-J. Seong, W. Lee, M. Hasan, G. Jung, and H. Hwang, "An electrically modifiable synapse array of resistive switching memory, "Nanotechnology, vol. 20, no. 34, 2009, article 345201.
31. H. Abdalla and M. D. Pickett, "SPICE modeling of memristors, "in Proc. IEEE Int. Symp. Circuits Syst., 2011, pp. 1832-1835.
32. D. Biolek, Z. Biolek, and V. Biolkova, "PSPICE modeling of meminductor, "Int. J. Analog Integr. Circuits Signal Process., vol. 66, pp. 129-137, 2011.
33. Z. Biolek, D. Biolek, and V. Biolkova, "SPICE model of memristor with nonlinear dopant drift, "Radioengineering, vol. 18, no. 2, pp. 210-214, 2009.
34. T. Kumaki, Y. Kuroda, T. Koide, H. Mattausch, H. Noda, K. Dosaka, K. Arimoto, and K. Saito, "CAM-based VLSI architecture for Huffman coding with real-time optimization of the code word table [image coding example], "in Proc. IEEE Int. Symp. Circuits Syst., 2005, pp. 5202-5205.
35. K. Pagiamtzis and A. Sheikholeslami, "Content-addressable memory (CAM) circuits and architectures: A tutorial and survey, "IEEE J. Solid-State Circuits, vol. 41, no. 3, pp. 712-727, Mar. 2006. (Pubitemid 43327064)
36. L. B. Kish and P. M. Ajayan, "TerraByte flash memory with carbon nanotubes, "Appl. Phys. Lett., vol. 86, no. 9, 2005, article 093106.
37. K. Pagiamtzis and A. Sheikholeslami, "A low-power content-addressable memory (CAM) using pipelined hierarchical search scheme, "IEEE J. Solid-State Circuits, vol. 39, no. 9, pp. 1512-1519, Sep. 2004.
38. O. Kavehei, S. Al-Sarawi, K. Cho, K. Eshraghian, and D. Abbott, "An analytical approach for memristive nanoarchitectures, "IEEE Trans. Nanotechnol., vol. 11, no. 2, pp. 374-385, Mar. 2011.
39. W. Xu, T. Zhang, and Y. Chen, "Design of spin-torque transfer magnetoresistive RAM and CAM/TCAM with high sensing and search speed, "IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 18, no. 1, pp. 66-74, Jan. 2010.
40. D. Hammerstrom and M. S. Zaveri, "CMOL/CMOS implementations of Bayesian inference engine: Digital and mixed-signal architectures and performance/priceVA hardware design space exploration, "in CMOS Processors and Memories, Part 1, K. Iniewski, Ed. Amsterdam, The Netherlands: Springer-Verlag, 2010, pp. 97-138.
41. S. H. Jo, T. Chang, I. Ebong, B. B. Bhadviya, P. Mazumder, and W. Lu, "Nanoscale memristor device as synapse in neuromorphic systems, "Nano Lett., vol. 10, no. 4, pp. 1297-1301, 2010.
42. R. Fano, L. Chu, and R. Adler, Electromagnetic Fields, Energy, and Forces. New York: Wiley, 1961.
43. D. Griffiths and C. Inglefield, Introduction to Electrodynamics. Englewood Cliffs, NJ: Prentice-Hall, 1999.
44. C. J. L. Doran, C. Doran, and A. N. Lasenby, Geometric Algebra for Physicists. Cambridge, U.K.: Cambridge Univ. Press, 2003.
45. T. G. Vold, "An introduction to geometric calculus and its application to electrodynamics, "Amer. J. Phys., vol. 61, pp. 505-505, 1993.