Bias current generators with wide dynamic range

Analog Integrated Circuits and Signal Processing

Volumn 43, Issue 3, 2005, Pages 247-268

  Delbrück, Tobi ^a   Van Schaik, André ^b  

^a UNIVERSITY OF ZURICH   (Switzerland)

^b UNIVERSITY OF SYDNEY   (Australia)

Author keywords

Bias current generator; Current divider; Current reference; Current splitter; PTAT

Indexed keywords

DIGITAL TO ANALOG CONVERSION; ELECTRIC CURRENTS; ELECTRIC GENERATORS; ELECTRIC POTENTIAL; NONDESTRUCTIVE EXAMINATION; PRODUCT DESIGN; SIGNAL THEORY; THERMAL EFFECTS; TRANSCONDUCTANCE;

BIAS CURRENT GENERATORS; CURRENT DIVIDERS; CURRENT REFERENCE; CURRENT SPLITTERS; PTAT;

CMOS INTEGRATED CIRCUITS;

EID: 21244466365     PISSN: 09251030     EISSN: None     Source Type: Journal    
DOI: 10.1007/s10470-005-1606-1     Document Type: Conference Paper

References (33)

1. P.R. Gray, R.J. Hurst, S.H. Lewis, and R.G. Meyer, Analysis and Design of Analog Integrated Circuits, 4th edition. John Wiley, 2001.
2. A. van Schaik and S. Shamma, "A neuromorphic sound local izer," Analog Integrated Circuits and Signal Processing, vol. 39, pp. 267-273, 2004.
3. T. Delbruck and S.C. Liu, "A silicon early visual system as a model animal," Vision Research, vol. 44, pp. 2083-2089, 2004.
4. P. Lichtsteiner, T. Delbruck, and J. Kramer, "Improved ON/OFF temporally differentiating address-event imager," in 11th IEEE International Conference on Electronics, Circuits and Systems (ICECS2004), Tel Aviv, Israel, 2004, pp.
5. X. Arreguit, A. van Schaik, F. Baudin, M. Bidiville, and E. Racher, "A CMOS motion detector system for pointing devices," IEEE Journal of Solid State Circuits, vol. 31, pp. 1916-1921, 1996.
6. T. Delbruck and A. van Schaik, "Bias current generators with wide dynamic range," in 2004 International Symposium on Circuits and Systems, Vancouver, Canada, 2004, pp. I-337-tI340.
7. D. Cohen and G. Lewicki, "MOSIS-The ARRA silicon broker," in Second Caltech Conference on VLSI, Pasadena, 1981, pp. 29-44.
8. R.J. Widlar, "Design techniques for monolithic operational amplifiers," IEEE Journal of Solid State Circuits, vol. SC-4, pp. 184-191, 1969.
9. R.J. Widlar, "Some circuit design techniques for linear integrated circuits," IEEE Transactions on Circuit Theory, vol. CT-12, pp. 586-590, 1965.
10. E. Vittoz. and J. Fellrath,"CMOS analog integrated circuits based on weak inversion operation," IEEE Journal of Solid-State Circuits, vol. 12, pp. 224-231, 1977.
11. T.H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits, Cambridge Univesity Press, 1998.
12. B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill Higher Education, 2000.
13. R.J. Baker, H.W. Li, and D.E. Boyce, CMOS Circuit Design, layout, and Simulation, IEEE Press, 1998.
14. J.M. Steininger, "Understanding wide-hand MOS transistors," IEEE Circuits and Devices, vol. 6, pp. 26-31, 1990.
15. S. Nicolson and K. Phang, "Improvements in biasing and compensation of CMOS opamps," in 2004 Intl. Symposium on Circuits and Systems (ISCAS 2004), Vancouver, Canada, 2004, pp. 665-668.
16. P. Lichtsteiner, "Bias current generator. Semester Project Report," Inst. of Neuroinformatics, Zurich 2001.
17. G.A. Rincon-Mora, Voltage References: from Diodes to Precision High-Order Bandgap Circuits, John Wiley, 2001.
18. V.V. Ivanov and I.M. Filanovsky, Operational Amplifier Speed and Accuracy Improvement: Analog Circuit Design With Structural Methodology, Kluwer Academic Publishers, 2004.
19. G. Bult and G. Geelen, "An inherently linear and compact MOST-only current division technique," IEEE Journal of Solid-State Circuits, vol. 27, pp. 1730-1735, 1992.
20. A. Rose, Vision: Human and Electronic, Plenum Press, New York, 1973.
21. B. Linares-Barranco and T. Serrano-Gotarredona, "On the design and characterization of femtoampere current mode circuits," IEEE Journal of Solid-State Circuits, vol. 38 pp. 1353-1363, 2003.
22. B. Linares-Barranco, T. Serrano-Gotarredona, R. Serrano-Gotarredona, and C. Serrano-Gotarredona, "Current mode techniques for sub-pico-ampere circuit design," Analog Integrated Circuits and Signal Processing, vol. 38, pp. 103-119, 2004.
23. E. Vittoz, "Electronics Laboratories Advanced Engineering Course on CMOS IC Design '02, Advanced Analog IC Design, Lausanne, Switzerland, August 26-30, 2002," EPFL-Lausanne, Switzerland, 2002.
24. Y. Cheng, M. Chan, K. Hui, M. Jeng, Z. Liu, J. Huang, K. Chen, J. Chen, R. Tu, P.K. Ko, and C. Hu, "BSIM3v3.2.2. MOSFET Model Users' Manual," Department of Electrical Engineering and Computer Sciences, University of California, Berkeley 1999.
25. M.-C. Jeng, "Design and modeling of deep-suhmicrometer MOSFFTs," University of California Berkeley, Berkeley, PhD EDL M90/90, 1990.
26. C.A. Mead, Analog VLSI and Neural Systems, Addison-Wesley, Reading, MA, 1989.
27. S.M. Sze, Physics of Semiconductor Devices, 2nd edition, John Wiley & Sons, 1981.
28. P.E. Allen and D.R. Holberg, CMOS Analog Circuit Design, Harcourt Brace Jvanovich College Publishers, 1987.
29. M.A. Green, "Instrinsic concentration, effective densities of states, and effective mass in silicon," Journal of Applied Physics, vol. 67, pp. 2944-2954, 1990.
30. A.B. Sproul and M.A. Green, "Instrinsic carrier concentration and minority-carrier mobility of silicon from 77 to 300 K," Journal of Applied Physics, vol. 73, pp. 1214-1225, 1993.
31. W.A. Lane and G.T. Wrixon, "The design of thin-film polysilicon resistors for analog IC applications," IEEE Transactions on Electron Devices, vol. 36, pp. 738-744, 1989.
32. A. Hastings, The Art of Analog Layout. Prentice Hall, Upper Saddle River, NJ, 2001.
33. T. Williams, The Circuit Designer's Companion. Butterworth-Heinemann Ltd., Oxford, 1991.