-
1
-
-
0017503796
-
CMOS analog integrated circuits based on weak inversion operation
-
June
-
E. Vittoz and J. Fellrath, "CMOS analog integrated circuits based on weak inversion operation," IEEE J. Solid-State Circuits, vol. SC-12, pp. 224-231, June 1977.
-
(1977)
IEEE J. Solid-State Circuits
, vol.SC-12
, pp. 224-231
-
-
Vittoz, E.1
Fellrath, J.2
-
2
-
-
0029342165
-
An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications
-
July
-
C. C. Enz, F. Krummernacher, and E. A. Vittoz, "An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications," Analog Integrat. Circuits Signal Process. J., vol. 8, pp. 83-114, July 1995.
-
(1995)
Analog Integrat. Circuits Signal Process. J.
, vol.8
, pp. 83-114
-
-
Enz, C.C.1
Krummernacher, F.2
Vittoz, E.A.3
-
3
-
-
0002808741
-
A current-based MOSFET model for integrated circuit design
-
E. Sanchez-Sinencio and A. G. Andreou, Eds. Piscataway, NJ: IEEE Press, ch. 2
-
C. Galup-Montoro, M. C. Schneider, and A. I. A. Cunha, "A current-based MOSFET model for integrated circuit design," in Low-Voltage/Low-Power Integrated Circuits and Systems, E. Sanchez-Sinencio and A. G. Andreou, Eds. Piscataway, NJ: IEEE Press, 1998, ch. 2.
-
(1998)
Low-Voltage/Low-Power Integrated Circuits and Systems
-
-
Galup-Montoro, C.1
Schneider, M.C.2
Cunha, A.I.A.3
-
5
-
-
0026987730
-
An inherently linear and compact MOST-only current division technique
-
Dec.
-
K. Bult and J. G. M. Geelen, "An inherently linear and compact MOST-only current division technique," IEEE J. Solid-State Circuits, vol. 27, pp. 1730-1735, Dec. 1992.
-
(1992)
IEEE J. Solid-State Circuits
, vol.27
, pp. 1730-1735
-
-
Bult, K.1
Geelen, J.G.M.2
-
7
-
-
0033226198
-
Very wide range tunable CMOS/bipolar current mirrors with voltage clamped input
-
Nov.
-
T. Serrano-Gotarredona, B. Linares-Barranco, and A. G. Andreas Andreou, "Very wide range tunable CMOS/bipolar current mirrors with voltage clamped input," IEEE Trans. Circuits Syst. I, vol. 46, pp. 1398-1407, Nov. 1999.
-
(1999)
IEEE Trans. Circuits Syst. I
, vol.46
, pp. 1398-1407
-
-
Serrano-Gotarredona, T.1
Linares-Barranco, B.2
Andreas Andreou, A.G.3
-
8
-
-
0003673020
-
-
Boston, MA: Kluwer
-
J. Mulder, W. A. Serdijn, A. C. Van der Woerd, and A. H. M. van Roermund, Dynamic Translinear and Log-Domain Circuits: Analysis and Synthesis. Boston, MA: Kluwer, 1998.
-
(1998)
Dynamic Translinear and Log-Domain Circuits: Analysis and Synthesis
-
-
Mulder, J.1
Serdijn, W.A.2
Van der Woerd, A.C.3
Van Roermund, A.H.M.4
-
9
-
-
0042698780
-
Shot noise behavior of subthreshold MOS transistors
-
Dec.
-
J. Fellrath, "Shot noise behavior of subthreshold MOS transistors," Revue de Physique Applique, vol. 13, pp. 719-723, Dec. 1978.
-
(1978)
Revue de Physique Applique
, vol.13
, pp. 719-723
-
-
Fellrath, J.1
-
10
-
-
84908144695
-
The use of fast Fourier transform for the estimation of power spectra: A method based on time averaging over short modified periodograms
-
June
-
P. D. Welch, "The use of fast Fourier transform for the estimation of power spectra: A method based on time averaging over short modified periodograms," IEEE Trans. Audio Electroacoust., vol. AU-15, pp. 70-73, June 1967.
-
(1967)
IEEE Trans. Audio Electroacoust.
, vol.AU-15
, pp. 70-73
-
-
Welch, P.D.1
-
11
-
-
0033350671
-
Systematic width-and-length dependent CMOS transistor mismatch characterization and simulation
-
Dec.
-
T. Serrano-Gotarredona and B. Linares-Barranco, "Systematic width-and-length dependent CMOS transistor mismatch characterization and simulation," Analog Integrat. Circuits Signal Process. J., vol. 21, pp. 271-296, Dec. 1999.
-
(1999)
Analog Integrat. Circuits Signal Process. J.
, vol.21
, pp. 271-296
-
-
Serrano-Gotarredona, T.1
Linares-Barranco, B.2
-
12
-
-
85084774754
-
Current mode techniques for sub-picoampere circuit design
-
to be published
-
B. Linares-Barranco, T. Serrano-Gotarredona, R. Serrano-Gotarredona, and C. Serrano-Gotarredona, "Current mode techniques for sub-picoampere circuit design," J. Analog Integrat. Circuits Signal Processing, to be published.
-
J. Analog Integrat. Circuits Signal Processing
-
-
Linares-Barranco, B.1
Serrano-Gotarredona, T.2
Serrano-Gotarredona, R.3
Serrano-Gotarredona, C.4
|