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Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 1, Issue , 2003, Pages

A multi-level static memory cell

(2) Hafliger P a Riis, H Kolle a

a UNIVERSITY OF OSLO (Norway)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG STORAGE; CAPACITANCE; COMPUTER SIMULATION; ELECTRIC POTENTIAL; LEAKAGE CURRENTS;

STATIC MULTI-LEVEL MEMORY CELLS;

ROM;

EID: 0037483042 PISSN: 02714310 EISSN: None Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper

Times cited : (14)

References (9)

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- Delbrück, T.¹

2
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- A floating-gate MOS learning array with locally computed weight updates
- December
- C. Diorio, P. Hasler, B. A. Minch, and C. Mead. A floating-gate MOS learning array with locally computed weight updates. IEEE Transactions on Electron Devices, 44(12):2281-2289, December 1997.
- (1997) IEEE Transactions on Electron Devices , vol.44 , Issue.12 , pp. 2281-2289
- Diorio, C.¹ Hasler, P.² Minch, B.A.³ Mead, C.⁴

3
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- A high-resolution non-volatile analog memory cell
- C. Diorio, S. Mahajan, P. Hasler, B. Minch, and C. Mead. A high-resolution non-volatile analog memory cell. Proc. IEEE Intl. Symp. on Circuits and Systems, 3:2233-2236, 1995.
- (1995) Proc. IEEE Intl. Symp. on Circuits and Systems , vol.3 , pp. 2233-2236
- Diorio, C.¹ Mahajan, S.² Hasler, P.³ Minch, B.⁴ Mead, C.⁵

4
- 4243833452
- PhD thesis, ETH Zürich, Switzerland
- P. Häfliger. A spike based learning rule and its implementation in analog hardware. PhD thesis, ETH Zürich, Switzerland, 2000. http://www.ifi.uio.no/~hafliger.
- (2000) A Spike Based Learning Rule and its Implementation in Analog Hardware
- Häfliger, P.¹

5
- 0001705212
- Floating gate analog memory for parameter and variable storage in a learning silicon neuron
- Orlando
- P. Häfliger and C. Rasche. Floating gate analog memory for parameter and variable storage in a learning silicon neuron. In IEEE International Symposium on Circuits and Systems, volume II, pages 416-419, Orlando, 1999.
- (1999) IEEE International Symposium on Circuits and Systems , vol.2 , pp. 416-419
- Häfliger, P.¹ Rasche, C.²

6
- 0002277004
- Resistive fuses: Analog hardware for detecting discontinuities in early vision
- C. Mead and M. Ismail, editors. Kluwer
- J. Harris, C. Koch, and J. Luo. Resistive fuses: Analog hardware for detecting discontinuities in early vision. In C. Mead and M. Ismail, editors, Analog VLSI Implementations of Neural Systems. Kluwer, 1989.
- (1989) Analog VLSI Implementations of Neural Systems
- Harris, J.¹ Koch, C.² Luo, J.³

7
- 0028768757
- Long-term CMOS static storage cell performing AD/DA conversion for analogue neural network implementations
- December
- P. Heim and M. A. Jabri. Long-term CMOS static storage cell performing AD/DA conversion for analogue neural network implementations. Electronic Letters, 30(25), December 1994.
- (1994) Electronic Letters , vol.30 , Issue.25
- Heim, P.¹ Jabri, M.A.²

8
- 0024909727
- An electrically trainable artificial neural network (ETANN) with 10240 'floating gate' synapses
- June
- M. Holler, S. Tam, H. Castro, and R. Benson. An electrically trainable artificial neural network (ETANN) with 10240 'floating gate' synapses. International Joint Conference on Neural Networks, (II): 191-196, June 1989.
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- Holler, M.¹ Tam, S.² Castro, H.³ Benson, R.⁴

9
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- Neuromorphic electronic systems
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- Mead, C.A.¹

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