Overview of the SpiNNaker system architecture

IEEE Transactions on Computers

Volumn 62, Issue 12, 2013, Pages 2454-2467

  Furber, Steve B ^a   Lester, David R ^a   Plana, Luis A ^a   Garside, Jim D ^a   Painkras, Eustace ^a   Temple, Steve ^a   Brown, Andrew D ^b  

^a UNIVERSITY OF MANCHESTER   (United Kingdom)

^b UNIVERSITY OF SOUTHAMPTON   (United Kingdom)

Author keywords

Interconnection architectures; neurocomputers; parallel processors; real time distributed

Indexed keywords

DAY-TO-DAY OPERATIONS; INTERCONNECTION ARCHITECTURE; LEVELS OF ABSTRACTION; NEUROCOMPUTERS; PARALLEL PROCESSOR; REAL-TIME DISTRIBUTED; SPIKING NEURAL NETWORKS; SYSTEM ARCHITECTURES;

ENGINES; FAULT DETECTION; MACHINE DESIGN; NETWORK ARCHITECTURE; NEURAL NETWORKS;

APPLICATION PROGRAMS;

EID: 84887947383     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2012.142     Document Type: Review

References (24)

1. SpiNNaker Project Website : http://apt.cs.man.ac.uk/projects/SpiNNaker/, 2013.
2. L.A. Plana, D. Clark, S. Davidson, S. Furber, J. Garside, E. Painkras, J. Pepper, S. Temple, and J. Bainbridge, "SpiNNaker: Design and Implementation of a GALS Multi-Core System-on-Chip," ACM J. Emerging Technologies in Computing Systems, vol. 7, no. 4, article 17, pp. 17:1-17:18, Dec. 2011.
3. X. Jin, M. Lujan, L.A. Plana, S. Davies, S. Temple, and S. Furber, "Modeling Spiking Neural Networks on SpiNNaker," Computing in Science & Eng., vol. 12, no. 5, pp. 91-97, Sept./Oct. 2010.
4. S.B. Furber and S. Temple, "Neural Systems Engineering," J. The Royal Soc. Interface, vol. 4, no. 13, pp. 193-206, Apr. 2007, doi:10.1098/rsif.2006.0177. (Pubitemid 46513051)
5. B. Pakkenberg, D. Pelvig, L. Marner, M.J. Bundgaard, H.J.G. Gundersen, J.R. Nyengaard, and L. Regeur, "Aging and the Human Neocortex," Experimental Gerontology, vol. 38, nos. 1/2, pp. 95-99, Jan./Feb. 2003. (Pubitemid 36110503)
6. D. Purves, G.J. Augustine, D. Fitzpatrick, W.C. Hall, A.-S. LaMantia, J.O. McNamara, and L.E. White, eds., Neuroscience, fourth ed. Sinauer Assoc. 2008.
7. C.U.M. Smith, Elements of Molecular Neurobiology, third ed. Wiley, 2002.
8. M. Mahowald, An Analog VLSI System for Stereoscopic Vision. Kluwer Academic Publishers, 1994.
9. M. Sivilotti, "Wiring Considerations in Analog VLSI Systems, with Application to Field-Programmable Networks," PhD dissertation, California Inst. of Technology, Pasadena, CA, 1991.
10. H. Markram, "The Blue Brain Project," Nature Rev. Neuroscience, vol. 7, pp. 153-160, Feb. 2006, doi:10.1038/nrn1848. (Pubitemid 43151601)
11. IBM Blue Gene Team, "Overview of the IBM Blue Gene/P Project," IBM J. Research and Development, vol. 52, nos. 1/2, pp. 199-220, Jan. 2008.
12. R. Ananthanarayanan, S.K. Esser, H.D. Simon, and D.S. Modha, "The Cat Is Out of the Bag: Cortical Simulations with 109 Neurons and 1013 Synapses," Proc. ACM/IEEE Conf. Supercomputing, pp. 1-12, 2009.
13. E.M. Izhikevich, "Simulation of Large-Scale Brain Models," www.nsi.edu/users/izhikevich/interest/index.htm, 2005.
14. E.M. Izhikevich and G.M. Edelman, "Large-Scale Model of Mammalian Thalamocortical Systems," Proc. Natl Academy of Sciences of USA, vol. 105, no. 9, pp. 3593-3598, Feb. 2008, doi: 10.1073/pnas.0712231105. (Pubitemid 351723597)
15. J. Bainbridge, "The CHAIN Works Tool Suite: A Complete Industrial Design Flow for Networks-on-Chips," Networks-on-Chips: Theory and Practice, F. Gebali, H. Elmilgi, and M.W. El-Kharashi eds., pp. 281-306, Taylor & Francis, Inc., 2009.
16. ARM968E-S Tech. Ref. Manual, ARM DDI 0311C, 2004.
17. AMBA Design Kit Tech. Ref. Manual, ARM DDI 0243A, 2003.
18. T. Sharp, L.A. Plana, F. Galluppi, and S.B. Furber, "Event-Driven SpiNNaker Simulation," Proc. Intl Conf. Neural Information Processing (ICONIP 11), pp. 424-430, 2011.
19. ARM PL190 Tech. Ref. Manual, ARM DDI 0181E, 2004.
20. J. Wu and S.B. Furber, "A Multicast Routing Scheme for a Universal Spiking Neural Network Architecture," The Computer J., vol. 53, no. 3, pp. 280-288, 2010, doi:10.1093/comjnl/bxp024.
21. I. Koren and C. Krishna, Fault-Tolerant Systems. Morgan Kaufmann, 2007.
22. L.A. Plana, S.B. Furber, S. Temple, M. Khan, Y. Shi, J. Wu, and S. Yang, "A GALS Infrastructure for a Massively Parallel Multiprocessor," IEEE Design & Test of Computers, vol. 24, no. 5, pp. 454-463, Sept. 2007, doi:10.1109/MDT.2007.149. (Pubitemid 47577894)
23. L.D. Solano-Quinde and B.M. Bode, "Module Prototype for Online Failure Prediction for the IBM Blue Gene/L," Proc. IEEE Electro/Information Technology Conf. (EIT 08), pp. 470-474, May 2008, doi:10.1109/EIT.2008.4554349.
24. A.P. Davison, D. Bru derle, J.M. Eppler, J. Kremkow, E. Muller, D.A. Pecevski, L. Perrinet, and P. Yger P, "PyNN: A Common Interface for Neuronal Network Simulators," Frontiers Neuroinformatics, vol. 2, pp. 1-10, 2008, doi:10.3389/neuro.11.011.2008.