High performance SoC design using magnetic logic and memory

IFIP Advances in Information and Communication Technology

Volumn 379 AICT, Issue , 2012, Pages 10-33

  Zhao, Weisheng ^a   Torres, Lionel ^c   Cargnini, Luís Vitório ^c   Brum, Raphael Martins ^c   Zhang, Yue ^a   Guillemenet, Yoann ^c   Sassatelli, Gilles ^c   Lakys, Yahya ^a   Klein, Jacques Olivier ^a   Etiemble, Daniel ^b   Ravelosona, Dafiné ^a   Chappert, Claude ^a  

^a UNIVERSITÉ PARIS SACLAY   (France)

^b CNRS   (France)

^c LIRMM   (France)

Author keywords

Magnetic Logic; MRAM; Non volatile CPU; Reconfigurable logic

Indexed keywords

CACHE MEMORY; CMOS INTEGRATED CIRCUITS; COMPUTATION THEORY; FERROELECTRIC DEVICES; FERROELECTRIC RAM; INTEGRATED CIRCUIT DESIGN; LEAKAGE CURRENTS; LOGIC CIRCUITS; MAGNETIC RECORDING; MAGNETIC STORAGE; MRAM DEVICES; PROGRAMMABLE LOGIC CONTROLLERS; RECONFIGURABLE HARDWARE; SYSTEM-ON-CHIP; VLSI CIRCUITS;

ARCHITECTURAL POINTS; CRITICAL ISSUES; HIGH SPEED COMPUTING; MAGNETIC LOGIC; MRAM; MRAM TECHNOLOGY; NON-VOLATILE; RECONFIGURABLE LOGIC;

COMPUTER CIRCUITS;

EID: 84870711039     PISSN: 18684238     EISSN: None     Source Type: Book Series    
DOI: 10.1007/978-3-642-32770-4_2     Document Type: Conference Paper

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