Fabrication of a nonvolatile full adder based on logic-in-memory architecture using magnetic tunnel junctions

Applied Physics Express

Volumn 1, Issue 9, 2008, Pages 0913011-0913013

  Matsunaga, Shoun ^a   Hayakawa, Jun ^b   Ikeda, Shoji ^a   Miura, Katsuya ^a,b   Hasegawa, Haruhiro ^a   Endoh, Tetsuo ^a   Ohno, Hideo ^a   Hanyu, Takahiro ^a  

^a TOHOKU UNIVERSITY   (Japan)

^b HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; CHARGE COUPLED DEVICES; ELECTRIC CONDUCTIVITY; FABRICATION; FIELD EFFECT TRANSISTORS; LOGIC CIRCUITS; MAGNESIUM; MAGNETIC DEVICES; MAGNETIC FIELD EFFECTS; MAGNETORESISTANCE; METALLIC COMPOUNDS; MOS DEVICES; SEMICONDUCTOR MATERIALS; SEMICONDUCTOR QUANTUM DOTS; TRANSISTOR TRANSISTOR LOGIC CIRCUITS; TRANSISTORS; TUNNEL JUNCTIONS; TUNNELS; WAVEGUIDE JUNCTIONS;

BASIC OPERATIONS; COMPLEMENTARY METAL OXIDE SEMICONDUCTOR PROCESSES; FULL ADDERS; INTERCONNECTION DELAYS; LOW POWERS; MAGNESIUM OXIDES; MAGNETIC TUNNEL JUNCTIONS; MEMORY ARCHITECTURES; METAL OXIDES; MOS TRANSISTORS; NON VOLATILES; NONVOLATILE LOGICS; NONVOLATILE MEMORIES;

SEMICONDUCTOR JUNCTIONS;

EID: 57649087959     PISSN: 18820778     EISSN: 18820786     Source Type: Journal    
DOI: 10.1143/APEX.1.091301     Document Type: Article

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