Asynchronous on-chip networks

System-on-Chip: Next Generation Electronics

Volumn , Issue , 2006, Pages 625-656

  Amde, Manish ^a   Felicijan, Tomaz ^c   Efthymiou, Aristides ^b   Edwards, Douglas ^c   Lavagno, Luciano ^d  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b UNIVERSITY OF EDINBURGH   (United Kingdom)

^c UNIVERSITY OF MANCHESTER   (United Kingdom)

^d POLITECNICO DI TORINO   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; LOGIC SYNTHESIS; NETWORK-ON-CHIP; PROGRAMMABLE LOGIC CONTROLLERS;

ASYNCHRONOUS SYSTEM; FORMAL FRAMEWORK; FUNCTIONAL BLOCK; FUNCTIONAL SYSTEMS; ON CHIP COMMUNICATION; ON-CHIP NETWORKS; SPEED-INDEPENDENT CIRCUITS; SYNTHESIS TECHNIQUES;

SYSTEM-ON-CHIP;

EID: 85013498045     PISSN: None     EISSN: None     Source Type: Book    
DOI: 10.1049/PBCS018E_ch18     Document Type: Chapter

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