Lowering power consumption in clock by using Globally Asynchronous Locally Synchronous design style

Proceedings - Design Automation Conference

Volumn , Issue , 1999, Pages 873-878

  Hemani, A ^a   Meincke, T ^a   Kumar, S ^a   Postula, A ^a   Olsson, T ^a   Nilsson, P ^a   Oberg, J ^a   Ellervee, P ^a   Lundqvist, D ^a  

^a ESDLab   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUIT LAYOUT; MICROPROCESSOR CHIPS; TIMING CIRCUITS;

GLOBALLY ASYNCHRONOUS LOCALLY SYNCHRONOUS DESIGNS;

VLSI CIRCUITS;

EID: 0032690091     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/309847.310091     Document Type: Conference Paper

References (14)