Decomposition and technology mapping of speed-independent circuits using Boolean relations

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 18, Issue 9, 1999, Pages 1221-1236

  Cortadella, Jordi ^a   Kishinevsky, Michael ^a   Kondratyev, Alex ^a   Lavagno, Luciano ^a   Pastor, Enric ^a   Yakovlev, Alexandre ^a  

^a UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; COMBINATORIAL CIRCUITS; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; INTEGRATED CIRCUIT LAYOUT;

BOOLEAN DECOMPOSITIONS; SPEED-INDEPENDENT CIRCUITS;

ASYNCHRONOUS SEQUENTIAL LOGIC;

EID: 0032595821     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.784116     Document Type: Article

References (22)

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