Modeling and validating globally asynchronous design in synchronous frameworks

Proceedings - Design, Automation and Test in Europe Conference and Exhibition

Volumn 1, Issue , 2004, Pages 384-389

  Mousavi, MohammadReza ^a   Le Guernic, Paul ^b   Talpin, Jean Pierre ^b   Shukla, Sandeep Kumar ^c   Basten, Twan ^a  

^a EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

^b CAMPUS DE BEAULIEU   (France)

^c VIRGINIA POLYTECHNIC INSTITUTE AND STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ASYNCHRONOUS DESIGN; CLOCK STRUCTURES; NETWORK PRESERVING; ASYNCHRONOUS NETWORKS; AUTOMATIC TRANSFORMATIONS; BEHAVIORAL EQUIVALENCE; MODELING AND VALIDATION; SYNCHRONOUS COMPONENTS; SYNCHRONOUS FRAMEWORK; SYNCHRONOUS PROGRAMMING; SYNCHRONOUS SIMULATION;

ASYNCHRONOUS MACHINERY; COMPUTER PROGRAMMING; COMPUTER SIMULATION; MATHEMATICAL MODELS; NETWORK PROTOCOLS; PROBLEM SOLVING; REAL TIME SYSTEMS; CLOCKS; EXHIBITIONS; MODEL CHECKING;

COMPUTER AIDED DESIGN; DESIGN;

EID: 3042515543     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2004.1268877     Document Type: Conference Paper

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