Scanning the technology applications of asynchronous circuits

Proceedings of the IEEE

Volumn 87, Issue 2, 1999, Pages 223-233

  Van Kees Berkel, C H ^a,d   Josephs, Mark B ^b   Nowick, Steven M ^c  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

^b EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

^c LONDON SOUTH BANK UNIVERSITY   (United Kingdom)

^d Department of Earth and Environmental Sciences   (United States)

Author keywords

Asynchronous circuits; Asynchronous systems; CAD tools; Heterogeneous timing; High performance; Low noise; Low power; Testability

Indexed keywords

COMPUTER AIDED LOGIC DESIGN; DATABASE SYSTEMS; ELECTROMAGNETIC COMPATIBILITY;

LOGIC CIRCUIT TESTING;

ASYNCHRONOUS SEQUENTIAL LOGIC;

EID: 0033079595     PISSN: 00189219     EISSN: None     Source Type: Journal    
DOI: 10.1109/5.740016     Document Type: Article

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