A low-power, low noise, configurable self-timed DSP

Proceedings - 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems

Volumn 1998-March, Issue , 1998, Pages 32-42

  Paver, N C ^a   Day, P ^a   Farnsworth, C ^a   Jackson, D L ^a   Lien, W A ^a   Liu, J ^a  

^a Cogency Technology Inc ^*  (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

ASYNCHRONOUS SEQUENTIAL LOGIC;

APPLICATION SPECIFIC; COMMERCIAL IMPLEMENTATION; COMMERCIAL VIABILITY; DESIGN STYLES; FULLY COMPATIBLE; INTEGRATED ARCHITECTURE; NOISE EMISSIONS; NOISE-SENSITIVE APPLICATIONS;

DIGITAL SIGNAL PROCESSING;

EID: 84893719143     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASYNC.1998.666492     Document Type: Conference Paper

References (11)

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