Flat-Topology High-Throughput Compute Node with AWGR-Based Optical-Interconnects

Journal of Lightwave Technology

Volumn 34, Issue 12, 2016, Pages 2959-2968

  Grani, Paolo ^a   Proietti, Roberto ^a   Cheung, Stanley ^a   Ben Yoo, S J ^a  

^a Davis   (United States)

Author keywords

Arrayed Waveguide Grating Routers; Chip Multi Processor Systems; Optical Interconnects; Tiled CMP Architectures

Indexed keywords

ARRAYED WAVEGUIDE GRATINGS; DYNAMIC FREQUENCY SCALING; ENERGY CONSERVATION; ENERGY EFFICIENCY; ENERGY UTILIZATION; LARGE SCALE SYSTEMS; MULTIPROCESSING SYSTEMS; OPTICAL COMMUNICATION; OPTICAL INTERCONNECTS; POWER MANAGEMENT; VOLTAGE SCALING; WAVEGUIDES;

BUILDING BLOCKES; CHIP MULTI-PROCESSORS; DYNAMIC VARIABLES; ENERGY EFFICIENCY OPTIMIZATIONS; FUTURE ENERGIES; PROPOSED ARCHITECTURES; SIMULATION STUDIES; TILED CMP;

MEMORY ARCHITECTURE;

EID: 84977147338     PISSN: 07338724     EISSN: None     Source Type: Journal    
DOI: 10.1109/JLT.2015.2510656     Document Type: Article

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