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Volumn , Issue , 2013, Pages 717-720

A variable-bandwidth, power-scalable optical receiver front-end in 65 nm

Author keywords

[No Author keywords available]

Indexed keywords

65 NM CMOS TECHNOLOGIES; DC OPERATING POINT; INVERTER-BASED; OFFSET COMPENSATION; RECEIVER FRONT-ENDS; SIMULATED PERFORMANCE; TRANSIMPEDANCE AMPLIFIERS; VARIABLE BANDWIDTHS;

EID: 84893180673     PISSN: 15483746     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MWSCAS.2013.6674749     Document Type: Conference Paper
Times cited : (10)

References (10)
  • 2
    • 67449128189 scopus 로고    scopus 로고
    • Device requirements for optical interconnects to silicon chips
    • July
    • D. A. B. Miller, Device requirements for optical interconnects to silicon chips, Proceedings of the IEEE, vol. 97, no. 7, pp. 1166-1185, July 2009.
    • (2009) Proceedings of the IEEE , vol.97 , Issue.7 , pp. 1166-1185
    • Miller, D.A.B.1
  • 3
    • 33947389289 scopus 로고    scopus 로고
    • Exploring the design space of self-regulating power-aware on/off interconnection networks
    • March
    • V. Soteriou and L. S. Peh, Exploring the Design Space of Self-Regulating Power-Aware On/Off Interconnection Networks, IEEE Transactions onParallel and Distributed Systems, vol.18, no.3, pp.393-408, March 2007.
    • (2007) IEEE Transactions OnParallel and Distributed Systems , vol.18 , Issue.3 , pp. 393-408
    • Soteriou, V.1    Peh, L.S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.