Cache miss characterization in hierarchical large-scale cache-coherent systems

Proceedings of the 2012 10th IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA 2012

Volumn , Issue , 2012, Pages 691-696

  Ros, Alberto ^a   Cuesta, Blas ^b   Gómez, María Engracia ^c   Robles, Antonio ^c   Duato, José ^c  

^a UNIVERSITY OF MURCIA   (Spain)

^b INTEL RESEARCH   (United States)

^c UNIVERSITAT POLITÈCNICA DE VALÈNCIA   (Spain)

Author keywords

Characterization; directory protocols; extended cache coherence; scalability

Indexed keywords

CACHE COHERENCE; CACHE MISS; COHERENCE PROTOCOL; DIRECTORY PROTOCOL; HIGH POTENTIAL; POTENTIAL REDUCTION; SYMMETRIC MULTI-PROCESSORS;

CACHE MEMORY; CHARACTERIZATION; DISTRIBUTED PARAMETER NETWORKS; MULTIPROCESSING SYSTEMS; SCALABILITY;

HIERARCHICAL SYSTEMS;

EID: 84867256308     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPA.2012.102     Document Type: Conference Paper

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