Assessing the energy break-even point between an optical NoC architecture and an aggressive electronic baseline

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2014, Pages

  Ramini, Luca ^a   Ghiribaldi, Alberto ^a   Grani, Paolo ^b   Bartolini, Sandro ^b   Fankem, Hervé Tatenguem ^a   Bertozzi, Davide ^a  

^a UNIVERSITY OF FERRARA   (Italy)

^b UNIVERSITY OF SIENA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN; MICROPROCESSOR CHIPS;

BREAK-EVEN POINT; EMERGING TECHNOLOGIES; LOW-POWER TECHNOLOGY; MINIMUM REQUIREMENTS; NETWORK INTERFACE ARCHITECTURE; NETWORKS ON CHIPS; NOC ARCHITECTURES; ON CHIP COMMUNICATION;

NETWORK-ON-CHIP;

EID: 84903844563     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.7873/DATE2014.321     Document Type: Conference Paper

References (16)

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