SynFull: Synthetic traffic models capturing cache coherent behaviour

Proceedings - International Symposium on Computer Architecture

Volumn , Issue , 2014, Pages 109-120

  Badr, Mario ^a   Jerger, Natalie Enright ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

COMPLEX NETWORKS; MICROPROCESSOR CHIPS; NETWORK-ON-CHIP;

COMPLEX ARCHITECTURES; CURRENT SIMULATION; FULL-SYSTEM SIMULATION; NETWORKS ON CHIPS; PERFORMANCE SIMULATION; SIMULATION TIME; TRAFFIC GENERATION; TRAFFIC PATTERN;

COMPUTER ARCHITECTURE;

EID: 84905501319     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCA.2014.6853236     Document Type: Conference Paper

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